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-rw-r--r--ChangeLog9
-rw-r--r--gcc/ChangeLog82
-rw-r--r--gcc/DATESTAMP2
-rw-r--r--gcc/c-family/ChangeLog5
-rw-r--r--gcc/c/ChangeLog5
-rw-r--r--gcc/m2/ChangeLog16
-rw-r--r--gcc/testsuite/ChangeLog55
7 files changed, 173 insertions, 1 deletions
diff --git a/ChangeLog b/ChangeLog
index d813f52cbe6..ba99f8ff5ab 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,12 @@
+2023-11-01 Eric Gallager <egallager@gcc.gnu.org>
+
+ * .github/CONTRIBUTING.md: Wrap lines more tightly.
+
+2023-11-01 Eric Gallager <egallager@gcc.gnu.org>
+
+ * .github/CONTRIBUTING.md: New file.
+ * .github/PULL_REQUEST_TEMPLATE.md: New file.
+
2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
* configure: Regenerate.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f2a6852242c..3cdae5f6c45 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,85 @@
+2023-11-01 Roger Sayle <roger@nextmovesoftware.com>
+
+ PR target/110551
+ * config/i386/i386.md (*bmi2_umul<mode><dwi>3_1): Tidy condition
+ as operands[2] with predicate register_operand must be !MEM_P.
+ (peephole2): Optimize a mulx followed by a register-to-register
+ move, to place result in the correct destination if possible.
+
+2023-11-01 Patrick O'Neill <patrick@rivosinc.com>
+
+ * config/riscv/sync.md: Use riscv_subword_address function to
+ calculate the address and shift in atomic_test_and_set.
+
+2023-11-01 Vineet Gupta <vineetg@rivosinc.com>
+
+ * config/riscv/riscv.cc (riscv_promote_function_mode): Fix mode
+ returned for libcall case.
+
+2023-11-01 Martin Uecker <uecker@tugraz.at>
+
+ PR c/71219
+ * doc/invoke.texi: Document -Walloc-size option.
+
+2023-11-01 Edwin Lu <ewlu@rivosinc.com>
+
+ * genautomata.cc (write_automata): move endif
+
+2023-11-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ * omp-simd-clone.cc (simd_clone_adjust_return_type): Hoist out code to
+ create return array and don't return new type.
+ (simd_clone_adjust_argument_types): Hoist out code that creates
+ ipa_param_body_adjustments and don't return them.
+ (simd_clone_adjust): Call TARGET_SIMD_CLONE_ADJUST after return and
+ argument types have been vectorized, create adjustments and return array
+ after the hook.
+ (expand_simd_clones): Call TARGET_SIMD_CLONE_ADJUST after return and
+ argument types have been vectorized.
+
+2023-11-01 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/112332
+ * config/i386/i386.md (stack_protexct_set_2 peephole2):
+ Use general_gr_operand as operand 4 predicate.
+
+2023-11-01 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (stack_protect_set): Explicitly
+ generate scratch register in word mode.
+ (@stack_protect_set_1_<mode>): Rename to ...
+ (@stack_protect_set_1_<PTR:mode>_<SWI48:mode>): ... this.
+ Use SWI48 mode iterator to match scratch register.
+ (stack_protexct_set_1 peephole2): Use PTR, W and SWI48 mode
+ iterators to match peephole sequence. Use general_operand
+ predicate for operand 4. Allow different operand 2 and operand 3
+ registers and use peep2_reg_dead_p to ensure new scratch
+ register is dead before peephole seqeunce. Use peep2_reg_dead_p
+ to ensure old scratch register is dead after peephole sequence.
+ (*stack_protect_set_2_<mode>): Rename to ...
+ (*stack_protect_set_2_<mode>_si): .. this.
+ (*stack_protect_set_3): Rename to ...
+ (*stack_protect_set_2_<mode>_di): ... this.
+ Use PTR mode iterator to match stack protector memory move.
+ Use earlyclobber for all alternatives of operand 1.
+ (stack_protexct_set_2 peephole2): Use PTR, W and SWI48 mode
+ iterators to match peephole sequence. Use general_operand
+ predicate for operand 4. Allow different operand 2 and operand 3
+ registers and use peep2_reg_dead_p to ensure new scratch
+ register is dead before peephole seqeunce. Use peep2_reg_dead_p
+ to ensure old scratch register is dead after peephole sequence.
+
+2023-11-01 xuli <xuli1@eswincomputing.com>
+
+ * config/riscv/riscv-vector-builtins-functions.def (vundefined): Add vundefine
+ intrinsics for tuple types.
+ * config/riscv/riscv-vector-builtins.cc: Ditto.
+ * config/riscv/vector.md (@vundefined<mode>): Ditto.
+
+2023-11-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ * tree-vect-slp.cc (vect_build_slp_tree_1): Fix whitespace.
+
2023-10-31 David Malcolm <dmalcolm@redhat.com>
* Makefile.in (ANALYZER_OBJS): Add analyzer/record-layout.o.
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 7166a6c7e4c..48d4ae2e7d4 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20231101
+20231102
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog
index af8b9ed6c8b..3361fbd0cd0 100644
--- a/gcc/c-family/ChangeLog
+++ b/gcc/c-family/ChangeLog
@@ -1,3 +1,8 @@
+2023-11-01 Martin Uecker <uecker@tugraz.at>
+
+ PR c/71219
+ * c.opt (Walloc-size): New option.
+
2023-10-31 David Malcolm <dmalcolm@redhat.com>
* c-warn.cc (warn_for_multistatement_macros): Update for removal
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index c6dccf87b46..f911a55977b 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,8 @@
+2023-11-01 Martin Uecker <uecker@tugraz.at>
+
+ PR c/71219
+ * c-typeck.cc (convert_for_assignment): Add warning.
+
2023-10-26 liuhongt <hongtao.liu@intel.com>
* c-typeck.cc (build_vec_cmp): Pass type of arg0 to
diff --git a/gcc/m2/ChangeLog b/gcc/m2/ChangeLog
index 5ecb9c4a5bb..6c0b3286287 100644
--- a/gcc/m2/ChangeLog
+++ b/gcc/m2/ChangeLog
@@ -1,3 +1,19 @@
+2023-11-01 Gaius Mulley <gaiusmod2@gmail.com>
+
+ PR modula2/102989
+ * gm2-compiler/SymbolTable.mod (OverflowZType): Import from m2expr.
+ (ConstantStringExceedsZType): Remove import.
+ (GetConstLitType): Replace ConstantStringExceedsZType with OverflowZType.
+ * gm2-gcc/m2decl.cc (m2decl_ConstantStringExceedsZType): Remove.
+ (m2decl_BuildConstLiteralNumber): Re-write.
+ * gm2-gcc/m2decl.def (ConstantStringExceedsZType): Remove.
+ * gm2-gcc/m2decl.h (m2decl_ConstantStringExceedsZType): Remove.
+ * gm2-gcc/m2expr.cc (m2expr_StrToWideInt): Rewrite to check overflow.
+ (m2expr_OverflowZType): New function.
+ (ToWideInt): New function.
+ * gm2-gcc/m2expr.def (OverflowZType): New procedure function declaration.
+ * gm2-gcc/m2expr.h (m2expr_OverflowZType): New prototype.
+
2023-10-27 Gaius Mulley <gaiusmod2@gmail.com>
PR modula2/111530
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 15606034750..be21dadabbc 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,58 @@
+2023-11-01 Roger Sayle <roger@nextmovesoftware.com>
+
+ PR target/110551
+ * gcc.target/i386/pr110551-2.c: New test case.
+
+2023-11-01 Patrick O'Neill <patrick@rivosinc.com>
+
+ * gcc.target/riscv/amo-table-ztso-amo-add-1.c: Add Ztso extension to
+ dg-options for dg-do compile.
+ * gcc.target/riscv/amo-table-ztso-amo-add-2.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-amo-add-3.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-amo-add-4.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-amo-add-5.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-compare-exchange-1.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-compare-exchange-2.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-compare-exchange-3.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-compare-exchange-4.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-compare-exchange-5.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-compare-exchange-6.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-compare-exchange-7.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-fence-1.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-fence-2.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-fence-3.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-fence-4.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-fence-5.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-load-1.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-load-2.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-load-3.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-store-1.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-store-2.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-store-3.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-subword-amo-add-1.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-subword-amo-add-2.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-subword-amo-add-3.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-subword-amo-add-4.c: Ditto.
+ * gcc.target/riscv/amo-table-ztso-subword-amo-add-5.c: Ditto.
+ * lib/target-supports.exp: Add testing infrastructure to require the
+ Ztso extension or add it to an existing -march.
+
+2023-11-01 Martin Uecker <uecker@tugraz.at>
+
+ PR c/71219
+ * gcc.dg/Walloc-size-1.c: New test.
+ * gcc.dg/Walloc-size-2.c: New test.
+
+2023-11-01 Gaius Mulley <gaiusmod2@gmail.com>
+
+ PR modula2/102989
+ * gm2/pim/fail/largeconst.mod: Updated foo to an outrageous value.
+ * gm2/pim/fail/largeconst2.mod: Duplicate test removed.
+
+2023-11-01 xuli <xuli1@eswincomputing.com>
+
+ * gcc.target/riscv/rvv/base/tuple_vundefined.c: New test.
+
2023-10-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
* gcc.dg/vect/vect-gather-6.c: New test.