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-rw-r--r--gcc/config/alpha/alpha.h11
-rw-r--r--gcc/config/alpha/alpha.md22
-rw-r--r--gcc/config/gnu.h7
-rw-r--r--gcc/config/i386/gnu.h3
-rw-r--r--gcc/config/i386/i386.h1
-rw-r--r--gcc/config/i386/xm-aix.h29
-rw-r--r--gcc/config/i386/xm-isc.h2
-rw-r--r--gcc/config/i386/xm-osf.h22
-rw-r--r--gcc/config/i386/xm-sco.h12
-rw-r--r--gcc/config/i386/xm-sco5.h11
-rw-r--r--gcc/config/i386/xm-sysv4.h11
-rw-r--r--gcc/config/i960/i960.md8
-rw-r--r--gcc/config/m68k/m68k.h2
-rw-r--r--gcc/config/m68k/m68k.md194
-rw-r--r--gcc/config/m68k/xm-3b1.h4
-rw-r--r--gcc/config/m68k/xm-atari.h41
-rw-r--r--gcc/config/m68k/xm-crds.h12
-rw-r--r--gcc/config/m68k/xm-mot3300.h5
-rw-r--r--gcc/config/m68k/xm-next.h2
-rw-r--r--gcc/config/m68k/xm-plexus.h7
-rw-r--r--gcc/config/m88k/xm-sysv3.h2
-rw-r--r--gcc/config/mips/abi64.h29
-rw-r--r--gcc/config/mips/bsd-4.h2
-rw-r--r--gcc/config/mips/bsd-5.h3
-rw-r--r--gcc/config/mips/cross64.h2
-rw-r--r--gcc/config/mips/dec-osf1.h3
-rw-r--r--gcc/config/mips/ecoff.h6
-rw-r--r--gcc/config/mips/ecoffl.h4
-rw-r--r--gcc/config/mips/elf.h2
-rw-r--r--gcc/config/mips/elforion.h4
-rw-r--r--gcc/config/mips/gnu.h5
-rw-r--r--gcc/config/mips/iris3.h4
-rw-r--r--gcc/config/mips/iris4.h2
-rw-r--r--gcc/config/mips/iris4loser.h2
-rw-r--r--gcc/config/mips/iris5.h2
-rw-r--r--gcc/config/mips/iris5gas.h2
-rw-r--r--gcc/config/mips/mips.c4
-rw-r--r--gcc/config/mips/mips.h17
-rw-r--r--gcc/config/mips/news4.h1
-rw-r--r--gcc/config/mips/news5.h4
-rw-r--r--gcc/config/mips/osfrose.h4
-rw-r--r--gcc/config/mips/rtems64.h4
-rw-r--r--gcc/config/mips/sni-gas.h5
-rw-r--r--gcc/config/mips/svr3-4.h5
-rw-r--r--gcc/config/mips/svr3-5.h5
-rw-r--r--gcc/config/mips/svr4-4.h7
-rw-r--r--gcc/config/mips/svr4-5.h3
-rw-r--r--gcc/config/mips/svr4-t.h1
-rw-r--r--gcc/config/mips/ultrix.h10
-rw-r--r--gcc/config/ns32k/xm-pc532-min.h27
-rw-r--r--gcc/config/rs6000/rs6000.c38
-rw-r--r--gcc/config/rs6000/rs6000.h46
-rw-r--r--gcc/config/rs6000/rs6000.md24
-rw-r--r--gcc/config/rs6000/sysv4.h5
-rw-r--r--gcc/config/rs6000/xm-cygwin32.h25
-rw-r--r--gcc/config/rs6000/xm-mach.h23
-rw-r--r--gcc/config/rs6000/xm-sysv4.h4
-rw-r--r--gcc/config/sparc/sparc.c31
-rw-r--r--gcc/config/sparc/sparc.h10
-rw-r--r--gcc/config/sparc/xm-linux.h2
-rw-r--r--gcc/config/sparc/xm-sol2.h2
-rw-r--r--gcc/config/sparc/xm-sysv4.h7
-rw-r--r--gcc/config/vax/vax.c16
63 files changed, 468 insertions, 342 deletions
diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h
index ff96b27435e..25740eae77b 100644
--- a/gcc/config/alpha/alpha.h
+++ b/gcc/config/alpha/alpha.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler, for DEC Alpha.
- Copyright (C) 1992, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1992, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
This file is part of GNU CC.
@@ -494,11 +494,11 @@ extern void override_options ();
listed once, even those in FIXED_REGISTERS.
We allocate in the following order:
- $f10-$f15 (nonsaved floating-point register)
+ $f1 (nonsaved floating-point register)
+ $f10-$f15 (likewise)
$f22-$f30 (likewise)
$f21-$f16 (likewise, but input args)
$f0 (nonsaved, but return value)
- $f1 (nonsaved, but immediate before saved)
$f2-$f9 (saved floating-point registers)
$1-$8 (nonsaved integer registers)
$22-$25 (likewise)
@@ -513,10 +513,11 @@ extern void override_options ();
$30, $31, $f31 (stack pointer and always zero/ap & fp) */
#define REG_ALLOC_ORDER \
- {42, 43, 44, 45, 46, 47, \
+ {33, \
+ 42, 43, 44, 45, 46, 47, \
54, 55, 56, 57, 58, 59, 60, 61, 62, \
53, 52, 51, 50, 49, 48, \
- 32, 33, \
+ 32, \
34, 35, 36, 37, 38, 39, 40, 41, \
1, 2, 3, 4, 5, 6, 7, 8, \
22, 23, 24, 25, \
diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index f90a4dd59a0..1feddc5eb6d 100644
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -1,5 +1,5 @@
;; Machine description for DEC Alpha for GNU C compiler
-;; Copyright (C) 1992, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
+;; Copyright (C) 1992, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
;; This file is part of GNU CC.
@@ -799,24 +799,24 @@
[(set (match_operand:HI 0 "register_operand" "=r")
(zero_extend:HI (match_operand:QI 1 "register_operand" "r")))]
""
- "and %1,0xff,%0"
- [(set_attr "type" "ilog")])
+ "zapnot %1,1,%0"
+ [(set_attr "type" "shift")])
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r,r")
(zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
"TARGET_BWX"
"@
- and %1,0xff,%0
+ zapnot %1,1,%0
ldbu %0,%1"
- [(set_attr "type" "ilog,ld")])
+ [(set_attr "type" "shift,ld")])
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r")
(zero_extend:SI (match_operand:QI 1 "register_operand" "r")))]
"! TARGET_BWX"
- "and %1,0xff,%0"
- [(set_attr "type" "ilog")])
+ "zapnot %1,1,%0"
+ [(set_attr "type" "shift")])
(define_expand "zero_extendqisi2"
[(set (match_operand:SI 0 "register_operand" "")
@@ -829,16 +829,16 @@
(zero_extend:DI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
"TARGET_BWX"
"@
- and %1,0xff,%0
+ zapnot %1,1,%0
ldbu %0,%1"
- [(set_attr "type" "ilog,ld")])
+ [(set_attr "type" "shift,ld")])
(define_insn ""
[(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI (match_operand:QI 1 "register_operand" "r")))]
"! TARGET_BWX"
- "and %1,0xff,%0"
- [(set_attr "type" "ilog")])
+ "zapnot %1,1,%0"
+ [(set_attr "type" "shift")])
(define_expand "zero_extendqidi2"
[(set (match_operand:DI 0 "register_operand" "")
diff --git a/gcc/config/gnu.h b/gcc/config/gnu.h
index d1691646e5a..ce0fb867eb1 100644
--- a/gcc/config/gnu.h
+++ b/gcc/config/gnu.h
@@ -1,5 +1,12 @@
/* Configuration common to all targets running the GNU system. */
+/* Macro to produce CPP_PREDEFINES for GNU on a given machine. */
+#define GNU_CPP_PREDEFINES(machine) \
+"-D" machine " -Acpu(" machine ") -Amachine(" machine ") \
+-Dunix -Asystem(unix) \
+-DMACH -Asystem(mach) \
+-D__GNU__ -Asystem(gnu)"
+
/* Provide GCC options for standard feature-test macros. */
#undef CPP_SPEC
#define CPP_SPEC "%{posix:-D_POSIX_SOURCE} %{bsd:-D_BSD_SOURCE}"
diff --git a/gcc/config/i386/gnu.h b/gcc/config/i386/gnu.h
index 971a5f880c2..bdce3ed000b 100644
--- a/gcc/config/i386/gnu.h
+++ b/gcc/config/i386/gnu.h
@@ -4,8 +4,7 @@
#include <i386/linux.h>
#undef CPP_PREDEFINES
-#define CPP_PREDEFINES "-Di386 -Acpu(i386) -Amachine(i386) \
--Dunix -Asystem(unix) -DMACH -Asystem(mach) -D__GNU__ -Asystem(gnu)"
+#define CPP_PREDEFINES GNU_CPP_PREDEFINES("i386")
#undef TARGET_VERSION
#define TARGET_VERSION fprintf (stderr, " (i386 GNU)");
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 8261a94b66a..bd90ab1844d 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -1864,7 +1864,6 @@ while (0)
#define CONST_COSTS(RTX,CODE,OUTER_CODE) \
case CONST_INT: \
- return (unsigned) INTVAL (RTX) < 256 ? 0 : 1; \
case CONST: \
case LABEL_REF: \
case SYMBOL_REF: \
diff --git a/gcc/config/i386/xm-aix.h b/gcc/config/i386/xm-aix.h
index 4cbd36ef518..ea9202112a1 100644
--- a/gcc/config/i386/xm-aix.h
+++ b/gcc/config/i386/xm-aix.h
@@ -1,2 +1,31 @@
+/* Configuration for GNU C-compiler for IBM PS/2 running AIX/386.
+ Copyright (C) 1988, 1993, 1997 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+#define USG
+
#undef TRUE
#undef FALSE
+
+#include "i386/xm-i386.h"
+
+/* If not compiled with GNU C, use the portable alloca. */
+#ifndef __GNUC__
+#define USE_C_ALLOCA
+#endif
diff --git a/gcc/config/i386/xm-isc.h b/gcc/config/i386/xm-isc.h
index e686c5ec9d4..7a0a47c4df5 100644
--- a/gcc/config/i386/xm-isc.h
+++ b/gcc/config/i386/xm-isc.h
@@ -1,3 +1,5 @@
+#include "i386/xm-sysv3.h"
+
#ifndef REAL_ARITHMETIC
#define REAL_VALUE_ATOF(x, mode) strtod ((x), (char **)0)
extern double strtod ();
diff --git a/gcc/config/i386/xm-osf.h b/gcc/config/i386/xm-osf.h
index 4cbd36ef518..cd06b56b6ad 100644
--- a/gcc/config/i386/xm-osf.h
+++ b/gcc/config/i386/xm-osf.h
@@ -1,2 +1,24 @@
+/* Configuration for GNU C-compiler for 386 running OSF/1
+ Copyright (C) 1994, 1997 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
#undef TRUE
#undef FALSE
+
+#include "i386/xm-i386.h"
diff --git a/gcc/config/i386/xm-sco.h b/gcc/config/i386/xm-sco.h
index ad634499d30..472ce047cf8 100644
--- a/gcc/config/i386/xm-sco.h
+++ b/gcc/config/i386/xm-sco.h
@@ -1,9 +1,18 @@
/* Configuration for GCC for Intel i386 running SCO. */
+#include "i386/xm-sysv3.h"
+
+/* On SCO 3.2.1, ldexp rejects values outside [0.5, 1). */
+
+#define BROKEN_LDEXP
+
/* Big buffers improve performance. */
#define IO_BUFFER_SIZE (0x8000 - 1024)
+/* SCO has a very small ARG_MAX. */
+#define SMALL_ARG_MAX
+
#ifndef __GNUC__
/* The SCO compiler gets it wrong, and treats enumerated bitfields
as signed quantities, making it impossible to use an 8-bit enum
@@ -11,3 +20,6 @@
#define ONLY_INT_FIELDS 1
#define CODE_FIELD_BUG 1
#endif
+
+/* SCO lacks sys_siglist. */
+#define NO_SYS_SIGLIST
diff --git a/gcc/config/i386/xm-sco5.h b/gcc/config/i386/xm-sco5.h
index 6b22b1d549f..99bc53c2bc5 100644
--- a/gcc/config/i386/xm-sco5.h
+++ b/gcc/config/i386/xm-sco5.h
@@ -1,7 +1,18 @@
/* Configuration for GCC for Intel i386 running SCO. */
+#include "i386/xm-sysv3.h"
+
/* Big buffers improve performance. */
#define IO_BUFFER_SIZE (0x8000 - 1024)
+/* OpenServer provides no sys_siglist,
+ but does offer the same data under another name. */
+#define sys_siglist _sys_siglist
+#undef SYS_SIGLIST_DECLARED
+#define SYS_SIGLIST_DECLARED
+/* If not compiled with GNU C, use the portable alloca. */
+#ifndef __GNUC__
+#define USE_C_ALLOCA
+#endif
diff --git a/gcc/config/i386/xm-sysv4.h b/gcc/config/i386/xm-sysv4.h
index 1365064a5a6..49d52b4e7f3 100644
--- a/gcc/config/i386/xm-sysv4.h
+++ b/gcc/config/i386/xm-sysv4.h
@@ -1,5 +1,16 @@
/* Configuration for GCC for Intel i386 running System V Release 4. */
+#include "i386/xm-i386.h"
+#include "xm-svr4.h"
+
+/* If not compiled with GNU C, use the portable alloca. */
+#ifndef __GNUC__
+#define USE_C_ALLOCA
+#endif
#ifdef __HIGHC__
#include <alloca.h> /* for MetaWare High-C on NCR System 3000 */
#endif
+
+/* Univel, at least, has a small ARG_MAX. Defining this is harmless
+ except for causing extra stat calls in the driver program. */
+#define SMALL_ARG_MAX
diff --git a/gcc/config/i960/i960.md b/gcc/config/i960/i960.md
index 679f8dac4eb..f24a9401b31 100644
--- a/gcc/config/i960/i960.md
+++ b/gcc/config/i960/i960.md
@@ -2218,13 +2218,7 @@
[(set (pc) (match_operand:SI 0 "register_operand" "d"))
(use (label_ref (match_operand 1 "" "")))]
""
- "*
-{
- if (flag_pic)
- return \"bx %l1(%0)\";
- else
- return \"bx (%0)\";
-}"
+ "bx (%0)"
[(set_attr "type" "branch")])
;;- jump to subroutine
diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h
index 311103cd6d9..fcce3455c3c 100644
--- a/gcc/config/m68k/m68k.h
+++ b/gcc/config/m68k/m68k.h
@@ -721,7 +721,7 @@ extern enum reg_class regno_reg_class[];
(C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \
(C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \
(C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : \
- (C) == 'M' ? (VALUE) < -0x100 || (VALUE) >= 0x100 : \
+ (C) == 'M' ? (VALUE) < -0x100 && (VALUE) >= 0x100 : \
(C) == 'N' ? (VALUE) >= 24 && (VALUE) <= 31 : \
(C) == 'O' ? (VALUE) == 16 : \
(C) == 'P' ? (VALUE) >= 8 && (VALUE) <= 15 : 0)
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 8ae150ef905..ddcac6555be 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -1,5 +1,5 @@
;;- Machine description for GNU compiler, Motorola 68000 Version
-;; Copyright (C) 1987, 88, 93-97, 1998 Free Software Foundation, Inc.
+;; Copyright (C) 1987, 88, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
;; This file is part of GNU CC.
@@ -1099,42 +1099,6 @@
return \"fmove%.s %1,%-\;move%.l %+,%0\";
return \"fmove%.s %f1,%0\";
}
- if (operands[1] == CONST0_RTX (SFmode)
- /* clr insns on 68000 read before writing.
- This isn't so on the 68010, but we have no TARGET_68010. */
- && ((TARGET_68020 || TARGET_5200)
- || !(GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0]))))
- {
- if (ADDRESS_REG_P (operands[0]))
- {
- /* On the '040, 'subl an,an' takes 2 clocks while lea takes only 1 */
- if (!TARGET_68040 && !TARGET_68060)
- return \"sub%.l %0,%0\";
- else
- {
-#ifdef MOTOROLA
-#ifdef SGS
- /* Many SGS assemblers croak on size specifiers for constants. */
- return \"lea 0,%0\";
-#else
- return \"lea 0.w,%0\";
-#endif
-#else
- return \"lea 0:w,%0\";
-#endif
- }
- }
- /* moveq is faster on the 68000. */
- if (DATA_REG_P (operands[0]) && !(TARGET_68020 || TARGET_5200))
- {
-#if defined(MOTOROLA) && !defined(CRDS)
- return \"moveq%.l %#0,%0\";
-#else
- return \"moveq %#0,%0\";
-#endif
- }
- return \"clr%.l %0\";
- }
return \"move%.l %1,%0\";
}")
@@ -1449,28 +1413,6 @@
;; zero extension instructions
-(define_insn "zero_extendqidi2"
- [(set (match_operand:DI 0 "general_operand" "=&d")
- (zero_extend:DI (match_operand:QI 1 "general_operand" "dm")))]
- ""
- "*
-{
- CC_STATUS_INIT;
- operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
- return \"moveq %#0,%0\;moveq %#0,%2\;move%.b %1,%2\";
-}")
-
-(define_insn "zero_extendhidi2"
- [(set (match_operand:DI 0 "general_operand" "=&d")
- (zero_extend:DI (match_operand:HI 1 "general_operand" "rm")))]
- ""
- "*
-{
- CC_STATUS_INIT;
- operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
- return \"moveq %#0,%0\;moveq %#0,%2\;move%.w %1,%2\";
-}")
-
;; this is the canonical form for (lshiftrt:DI x 32)
(define_insn "zero_extendsidi2"
[(set (match_operand:DI 0 "general_operand" "rm")
@@ -1487,13 +1429,10 @@
return \"clr%.l %0\;move%.l %1,%0\";
else
operands[2] = adj_offsettable_operand (operands[0], 4);
- if (GET_CODE (operands[1]) != REG || GET_CODE (operands[1]) != REG
- || REGNO (operands[1]) != REGNO (operands[2]))
- output_asm_insn (\"move%.l %1,%2\", operands);
if (ADDRESS_REG_P (operands[0]))
- return \"sub%.l %0,%0\";
+ return \"move%.l %1,%2\;sub%.l %0,%0\";
else
- return \"clr%.l %0\";
+ return \"move%.l %1,%2\;clr%.l %0\";
}")
(define_expand "zero_extendhisi2"
@@ -3683,31 +3622,6 @@
;; inclusive-or instructions
-(define_insn "iordi_zext"
- [(set (match_operand:DI 0 "general_operand" "=o,d")
- (ior:DI (zero_extend:DI (match_operand 1 "general_operand" "dn,dmn"))
- (match_operand:DI 2 "general_operand" "0,0")))]
- "!TARGET_5200"
- "*
-{
- int byte_mode;
-
- CC_STATUS_INIT;
- if (GET_CODE (operands[0]) == REG)
- operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
- else
- operands[0] = adj_offsettable_operand (operands[0], 4);
- if (GET_MODE (operands[1]) == SImode)
- return \"or%.l %1,%0\";
- byte_mode = (GET_MODE (operands[1]) == QImode);
- if (GET_CODE (operands[0]) == MEM)
- operands[0] = adj_offsettable_operand (operands[0], byte_mode ? 3 : 2);
- if (byte_mode)
- return \"or%.b %1,%0\";
- else
- return \"or%.w %1,%0\";
-}")
-
;; "iordi3" is mainly here to help combine().
(define_insn "iordi3"
[(set (match_operand:DI 0 "general_operand" "=o,d")
@@ -3857,24 +3771,33 @@
;; On all 68k models, this makes faster code in a special case.
;; See also ashlsi_16, ashrsi_16 and lshrsi_16.
+;; ??? This pattern can not work as written, because it fails if operand 0
+;; and operand 1 are the same register. This can happen for alternative 1.
+;; This will still fail even if an early clobber is added to the output
+;; for alternative 1. This is because reload may satisfy the matching
+;; constraint by forcing the output to use exactly the same register as
+;; operand 2, without noticing that this then causes a conflict with operand 1.
+;; Possible fix: check for operand 0/1 overlap, and emit correct but slower
+;; code. This should be rare if the early clobber is added.
+
(define_insn "iorsi_zexthi_ashl16"
- [(set (match_operand:SI 0 "general_operand" "=&d")
- (ior:SI (zero_extend:SI (match_operand:HI 1 "general_operand" "rmn"))
- (ashift:SI (match_operand:SI 2 "general_operand" "or")
+ [(set (match_operand:SI 0 "general_operand" "=&d,d")
+ (ior:SI (zero_extend:SI (match_operand:HI 1 "general_operand" "dmn,dmn"))
+ (ashift:SI (match_operand:SI 2 "general_operand" "o,0")
(const_int 16))))]
- ""
+ "0"
"*
{
CC_STATUS_INIT;
if (GET_CODE (operands[2]) != REG)
+ {
operands[2] = adj_offsettable_operand (operands[2], 2);
- if (GET_CODE (operands[2]) != REG
- || REGNO (operands[2]) != REGNO (operands[0]))
- output_asm_insn (\"move%.w %2,%0\", operands);
+ output_asm_insn (\"move%.w %2,%0\", operands);
+ }
return \"swap %0\;mov%.w %1,%0\";
}")
-(define_insn "iorsi_zext"
+(define_insn ""
[(set (match_operand:SI 0 "general_operand" "=o,d")
(ior:SI (zero_extend:SI (match_operand 1 "general_operand" "dn,dmn"))
(match_operand:SI 2 "general_operand" "0,0")))]
@@ -3884,13 +3807,13 @@
int byte_mode;
CC_STATUS_INIT;
- byte_mode = (GET_MODE (operands[1]) == QImode);
+ byte_mode = (GET_MODE(operands[1]) == QImode);
if (GET_CODE (operands[0]) == MEM)
operands[0] = adj_offsettable_operand (operands[0], byte_mode ? 3 : 2);
if (byte_mode)
- return \"or%.b %1,%0\";
+ return \"or%.b %1,%0\";
else
- return \"or%.w %1,%0\";
+ return \"or%.w %1,%0\";
}")
;; xor instructions
@@ -4516,9 +4439,9 @@
[(set (match_operand:DI 0 "general_operand" "=d")
(ashift:DI (match_operand:DI 1 "general_operand" "0")
(match_operand 2 "const_int_operand" "n")))]
- "((INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3)
+ "(INTVAL (operands[2]) == 1
|| INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16
- || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63))"
+ || INTVAL (operands[2]) == 2 || INTVAL (operands[2]) == 3)"
"*
{
operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
@@ -4528,19 +4451,10 @@
return \"rol%.l %#8,%1\;rol%.l %#8,%0\;move%.b %1,%0\;clr%.b %1\";
else if (INTVAL (operands[2]) == 16)
return \"swap %1\;swap %0\;move%.w %1,%0\;clr%.w %1\";
- else if (INTVAL (operands[2]) == 48)
- return \"mov%.l %1,%0\;swap %0\;clr%.l %1\;clr%.w %0\";
else if (INTVAL (operands[2]) == 2)
return \"add%.l %1,%1\;addx%.l %0,%0\;add%.l %1,%1\;addx%.l %0,%0\";
- else if (INTVAL (operands[2]) == 3)
+ else/* if (INTVAL (operands[2]) == 3)*/
return \"add%.l %1,%1\;addx%.l %0,%0\;add%.l %1,%1\;addx%.l %0,%0\;add%.l %1,%1\;addx%.l %0,%0\";
- else /* 32 < INTVAL (operands[2]) <= 63 */
- {
- operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 32);
- output_asm_insn (INTVAL (operands[2]) <= 8 ? \"asl%.l %2,%1\" :
- \"moveq %2,%0\;asl%.l %0,%1\", operands);
- return \"mov%.l %1,%0\;moveq %#0,%1\";
- }
} ")
(define_expand "ashldi3"
@@ -4551,9 +4465,9 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT
- || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3)
+ || (INTVAL (operands[2]) != 1 && INTVAL (operands[2]) != 32
&& INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16
- && (INTVAL (operands[2]) < 32 || INTVAL (operands[2]) > 63)))
+ && INTVAL (operands[2]) != 2 && INTVAL (operands[2]) != 3))
FAIL;
} ")
@@ -4717,10 +4631,10 @@
(ashiftrt:DI (match_operand:DI 1 "general_operand" "0")
(match_operand 2 "const_int_operand" "n")))]
"!TARGET_5200
- && ((INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3)
- || INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16
- || INTVAL (operands[2]) == 31
- || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63))"
+ && ((INTVAL (operands[2]) == 1 || INTVAL (operands[2]) == 2
+ || INTVAL (operands[2]) == 3 || INTVAL (operands[2]) == 8
+ || INTVAL (operands[2]) == 16 || INTVAL (operands[2]) == 31
+ || INTVAL (operands[2]) == 63))"
"*
{
operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
@@ -4733,23 +4647,12 @@
return \"move%.b %0,%1\;asr%.l %#8,%0\;ror%.l %#8,%1\";
else if (INTVAL (operands[2]) == 16)
return \"move%.w %0,%1\;clr%.w %0\;swap %1\;ext%.l %0\";
- else if (INTVAL (operands[2]) == 48)
- return \"swap %0\;ext%.l %0\;move%.l %0,%1\;smi %0\;ext%.w %0\";
else if (INTVAL (operands[2]) == 31)
return \"add%.l %1,%1\;addx%.l %0,%0\;move%.l %0,%1\;subx%.l %0,%0\";
else if (INTVAL (operands[2]) == 2)
return \"asr%.l %#1,%0\;roxr%.l %#1,%1\;asr%.l %#1,%0\;roxr%.l %#1,%1\";
- else if (INTVAL (operands[2]) == 3)
+ else/* if (INTVAL (operands[2]) == 3)*/
return \"asr%.l %#1,%0\;roxr%.l %#1,%1\;asr%.l %#1,%0\;roxr%.l %#1,%1\;asr%.l %#1,%0\;roxr%.l %#1,%1\";
- else /* 32 < INTVAL (operands[2]) <= 63 */
- {
- operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 32);
- output_asm_insn (INTVAL (operands[2]) <= 8 ? \"asr%.l %2,%0\" :
- \"moveq %2,%1\;asr%.l %1,%0\", operands);
- output_asm_insn (\"mov%.l %0,%1\;smi %0\", operands);
- return INTVAL (operands[2]) >= 15 ? \"ext%.w %d0\" :
- TARGET_68020 ? \"extb%.l %0\" : \"ext%.w %0\;ext%.l %0\";
- }
} ")
(define_expand "ashrdi3"
@@ -4760,9 +4663,10 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT
- || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3)
- && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16
- && (INTVAL (operands[2]) < 31 || INTVAL (operands[2]) > 63)))
+ || (INTVAL (operands[2]) != 1 && INTVAL (operands[2]) != 2
+ && INTVAL (operands[2]) != 3 && INTVAL (operands[2]) != 8
+ && INTVAL (operands[2]) != 16 && INTVAL (operands[2]) != 31
+ && INTVAL (operands[2]) != 32 && INTVAL (operands[2]) != 63))
FAIL;
} ")
@@ -4888,9 +4792,9 @@
(lshiftrt:DI (match_operand:DI 1 "general_operand" "0")
(match_operand 2 "const_int_operand" "n")))]
"!TARGET_5200
- && ((INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3)
- || INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16
- || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63))"
+ && ((INTVAL (operands[2]) == 1 || INTVAL (operands[2]) == 2
+ || INTVAL (operands[2]) == 3 || INTVAL (operands[2]) == 8
+ || INTVAL (operands[2]) == 16 || INTVAL (operands[2]) == 63))"
"*
{
operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
@@ -4903,19 +4807,10 @@
return \"move%.b %0,%1\;lsr%.l %#8,%0\;ror%.l %#8,%1\";
else if (INTVAL (operands[2]) == 16)
return \"move%.w %0,%1\;clr%.w %0\;swap %1\;swap %0\";
- else if (INTVAL (operands[2]) == 48)
- return \"move%.l %0,%1\;clr%.w %1\;clr%.l %0\;swap %1\";
else if (INTVAL (operands[2]) == 2)
return \"lsr%.l %#1,%0\;roxr%.l %#1,%1\;lsr%.l %#1,%0\;roxr%.l %#1,%1\";
- else if (INTVAL (operands[2]) == 3)
+ else /*if (INTVAL (operands[2]) == 3)*/
return \"lsr%.l %#1,%0\;roxr%.l %#1,%1\;lsr%.l %#1,%0\;roxr%.l %#1,%1\;lsr%.l %#1,%0\;roxr%.l %#1,%1\";
- else /* 32 < INTVAL (operands[2]) <= 63 */
- {
- operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 32);
- output_asm_insn (INTVAL (operands[2]) <= 8 ? \"lsr%.l %2,%0\" :
- \"moveq %2,%1\;lsr%.l %1,%0\", operands);
- return \"mov%.l %0,%1\;moveq %#0,%0\";
- }
} ")
(define_expand "lshrdi3"
@@ -4926,9 +4821,10 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT
- || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3)
- && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16
- && (INTVAL (operands[2]) < 32 || INTVAL (operands[2]) > 63)))
+ || (INTVAL (operands[2]) != 1 && INTVAL (operands[2]) != 2
+ && INTVAL (operands[2]) != 3 && INTVAL (operands[2]) != 8
+ && INTVAL (operands[2]) != 16 && INTVAL (operands[2]) != 32
+ && INTVAL (operands[2]) != 63))
FAIL;
} ")
diff --git a/gcc/config/m68k/xm-3b1.h b/gcc/config/m68k/xm-3b1.h
index 035004f1002..c966bc16309 100644
--- a/gcc/config/m68k/xm-3b1.h
+++ b/gcc/config/m68k/xm-3b1.h
@@ -1,3 +1,7 @@
+#define USG
+
+#include "m68k/xm-m68k.h"
+
/* Override part of the obstack macros. */
#define __PTR_TO_INT(P) ((int)(P))
diff --git a/gcc/config/m68k/xm-atari.h b/gcc/config/m68k/xm-atari.h
index 59f466460fe..323d89052c0 100644
--- a/gcc/config/m68k/xm-atari.h
+++ b/gcc/config/m68k/xm-atari.h
@@ -1,5 +1,46 @@
+/* Definitions of host machine for GNU compiler.
+ Atari TT ASV version.
+ Copyright (C) 1994, 1995, 1997 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+#include "m68k/xm-m68kv.h" /* Use the System V flavor of m68k host */
+
+#define HAVE_VPRINTF /* Host has vprintf() in library */
+
/* Add HZ define if missing */
#ifndef HZ
#define HZ 100 /* System clock */
#endif
+
+/* Define FULL_PROTOTYPES for protoize.c, to get <unistd.h> included.
+ We need this file for things like R_OK, not necessarily prototypes. */
+
+#define FULL_PROTOTYPES
+
+#if defined (__GNUC__) && __GNUC__ == 1
+#define alloca __builtin_alloca
+#endif
+
+/* The m88k and mips ports make use of fancy_abort to give possibly helpful
+ abort information rather than just dumping core. They do it in their
+ tm-* files. It seems more logical that this is a characteristic of
+ the host machine and not the target machine, so we do it here. */
+
+#define abort fancy_abort /* give possibly helpful abort info */
diff --git a/gcc/config/m68k/xm-crds.h b/gcc/config/m68k/xm-crds.h
index 2bf1bdbc406..80925dc8714 100644
--- a/gcc/config/m68k/xm-crds.h
+++ b/gcc/config/m68k/xm-crds.h
@@ -1,6 +1,18 @@
+#define USG
+
+#ifndef unos
+#define unos
+#endif
+
+#include "m68k/xm-m68k.h"
+
/* Avoid conflict with C library by changing name of this symbol. */
#define gettime gcc_gettime
+#ifndef __GNUC__
+#define USE_C_ALLOCA
+#endif
+
/* Override part of the obstack macros. */
#define __PTR_TO_INT(P) ((int)(P))
diff --git a/gcc/config/m68k/xm-mot3300.h b/gcc/config/m68k/xm-mot3300.h
index ea3b5589dbe..c61bd293e25 100644
--- a/gcc/config/m68k/xm-mot3300.h
+++ b/gcc/config/m68k/xm-mot3300.h
@@ -22,8 +22,13 @@ Boston, MA 02111-1307, USA. */
#define USG 1
+#include "m68k/xm-m68k.h"
+
+#define NO_SYS_SIGLIST
+
/* do not use alloca from -lPW with cc, because function epilogues use %sp */
#ifndef __GNUC__
+#define USE_C_ALLOCA
#ifdef __STDC__
extern void *alloca ();
#else
diff --git a/gcc/config/m68k/xm-next.h b/gcc/config/m68k/xm-next.h
index e0b53f2e04f..5c1e89d4a28 100644
--- a/gcc/config/m68k/xm-next.h
+++ b/gcc/config/m68k/xm-next.h
@@ -1,3 +1,5 @@
+#include "m68k/xm-m68k.h"
+
/* malloc does better with chunks the size of a page. */
#define OBSTACK_CHUNK_SIZE (getpagesize ())
diff --git a/gcc/config/m68k/xm-plexus.h b/gcc/config/m68k/xm-plexus.h
index 8498198ffe7..fbc9a32846e 100644
--- a/gcc/config/m68k/xm-plexus.h
+++ b/gcc/config/m68k/xm-plexus.h
@@ -1,5 +1,12 @@
/* Host environment for 68000's running System V. */
+#include "m68k/xm-m68k.h"
+
+#define USG
+#ifndef __GNUC__
+#define USE_C_ALLOCA
+#endif
+
#ifndef _SIZE_T_
typedef int size_t;
#define _SIZE_T_
diff --git a/gcc/config/m88k/xm-sysv3.h b/gcc/config/m88k/xm-sysv3.h
index 84110d7474d..3e8ab39dc95 100644
--- a/gcc/config/m88k/xm-sysv3.h
+++ b/gcc/config/m88k/xm-sysv3.h
@@ -19,6 +19,8 @@ along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
+#include "m88k/xm-m88k.h"
+
#define R_OK 4
#define W_OK 2
#define X_OK 1
diff --git a/gcc/config/mips/abi64.h b/gcc/config/mips/abi64.h
index 188939497ce..a3e768cdc2d 100644
--- a/gcc/config/mips/abi64.h
+++ b/gcc/config/mips/abi64.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. 64 bit ABI support.
- Copyright (C) 1994, 1995, 1996, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1994, 1995, 1996 Free Software Foundation, Inc.
This file is part of GNU CC.
@@ -63,10 +63,16 @@ Boston, MA 02111-1307, USA. */
#define MAX_ARGS_IN_REGISTERS (mips_abi == ABI_32 ? 4 : 8)
#undef REG_PARM_STACK_SPACE
+#if 0
+/* ??? This is necessary in order for the ABI_32 support to work. However,
+ expr.c (emit_push_insn) has no support for a REG_PARM_STACK_SPACE
+ definition that returns zero. That would have to be fixed before this
+ can be enabled. */
#define REG_PARM_STACK_SPACE(FNDECL) \
(mips_abi == ABI_32 \
? (MAX_ARGS_IN_REGISTERS*UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL) \
: 0)
+#endif
#define FUNCTION_ARG_PADDING(MODE, TYPE) \
(! BYTES_BIG_ENDIAN \
@@ -178,7 +184,8 @@ extern struct rtx_def *mips_function_value ();
} \
}
-#define STRICT_ARGUMENT_NAMING (mips_abi != ABI_32)
+/* ??? Should disable for mips_abi == ABI32. */
+#define STRICT_ARGUMENT_NAMING
/* A C expression that indicates when an argument must be passed by
reference. If nonzero for an argument, a copy of that argument is
@@ -206,24 +213,8 @@ extern struct rtx_def *mips_function_value ();
(mips_abi == ABI_EABI && (NAMED) \
&& FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED))
-/* Define LONG_MAX correctly for all users. We need to handle 32 bit EABI,
- 64 bit EABI, N32, and N64 as possible defaults. The checks performed here
- are the same as the checks in override_options in mips.c that determines
- whether MASK_LONG64 will be set.
-
- This does not handle inappropriate options or ununusal option
- combinations. */
-
#undef LONG_MAX_SPEC
-#if ((MIPS_ABI_DEFAULT == ABI_64) || ((MIPS_ABI_DEFAULT == ABI_EABI) && ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_64BIT)))
-#define LONG_MAX_SPEC \
- "%{!mabi=n32:%{!mno-long64:%{!mgp32:-D__LONG_MAX__=9223372036854775807L}}}"
-#else
-#define LONG_MAX_SPEC \
- "%{mabi=64:-D__LONG_MAX__=9223372036854775807L} \
- %{mlong64:-D__LONG_MAX__=9223372036854775807L} \
- %{mgp64:-D__LONG_MAX__=9223372036854775807L}"
-#endif
+#define LONG_MAX_SPEC "%{!mno-long64:-D__LONG_MAX__=9223372036854775807LL}"
/* ??? Unimplemented stuff follows. */
diff --git a/gcc/config/mips/bsd-4.h b/gcc/config/mips/bsd-4.h
index c2aee83df7b..1542ddd3944 100644
--- a/gcc/config/mips/bsd-4.h
+++ b/gcc/config/mips/bsd-4.h
@@ -44,3 +44,5 @@ Boston, MA 02111-1307, USA. */
/* Override defaults for finding the MIPS tools. */
#define MD_STARTFILE_PREFIX "/bsd43/usr/lib/cmplrs/cc/"
#define MD_EXEC_PREFIX "/bsd43/usr/lib/cmplrs/cc/"
+
+#include "mips/mips.h"
diff --git a/gcc/config/mips/bsd-5.h b/gcc/config/mips/bsd-5.h
index f97af5e1f80..75a468da32c 100644
--- a/gcc/config/mips/bsd-5.h
+++ b/gcc/config/mips/bsd-5.h
@@ -1,5 +1,4 @@
-/* Definitions of target machine for GNU compiler.
- MIPS RISC-OS, 5.0 BSD version.
+/* Definitions of target machine for GNU compiler. MIPS RISC-OS, 5.0 BSD version.
Copyright (C) 1991 Free Software Foundation, Inc.
This file is part of GNU CC.
diff --git a/gcc/config/mips/cross64.h b/gcc/config/mips/cross64.h
index 4462e5ecc55..fcbb16f34b3 100644
--- a/gcc/config/mips/cross64.h
+++ b/gcc/config/mips/cross64.h
@@ -1,6 +1,8 @@
/* Configuration for an Irix 5 host and Irix 6 target using SGI's cross64
package. */
+#include "mips/iris6.h"
+
#define STANDARD_INCLUDE_DIR "/usr/cross64/usr/include"
#undef MD_EXEC_PREFIX
#define MD_EXEC_PREFIX "/usr/cross64/usr/bin/"
diff --git a/gcc/config/mips/dec-osf1.h b/gcc/config/mips/dec-osf1.h
index ee7e787353c..cc0e7e15a0a 100644
--- a/gcc/config/mips/dec-osf1.h
+++ b/gcc/config/mips/dec-osf1.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. DECstation (OSF/1) version.
- Copyright (C) 1992, 1996, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1992, 1996 Free Software Foundation, Inc.
This file is part of GNU CC.
@@ -32,7 +32,6 @@ Boston, MA 02111-1307, USA. */
%{!shared: %{!non_shared: %{!call_shared: -non_shared}}}"
#include "mips/ultrix.h"
-#include "mips/mips.h"
/* Specify size_t and wchar_t types. */
#undef SIZE_TYPE
diff --git a/gcc/config/mips/ecoff.h b/gcc/config/mips/ecoff.h
index 0eaf15d8593..29bf0380c1f 100644
--- a/gcc/config/mips/ecoff.h
+++ b/gcc/config/mips/ecoff.h
@@ -1,6 +1,6 @@
/* Definitions of target machine for GNU compiler. MIPS version with
GOFAST floating point library.
- Copyright (C) 1994, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1994 Free Software Foundation, Inc.
This file is part of GNU CC.
@@ -19,12 +19,16 @@ along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
+#include "mips/mips.h"
+
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dmips -DMIPSEB -DR3000 -D_mips -D_MIPSEB -D_R3000"
/* Use memcpy, et. al., rather than bcopy. */
#define TARGET_MEM_FUNCTIONS
+/* US Software GOFAST library support. */
+#include "gofast.h"
#define INIT_TARGET_OPTABS INIT_GOFAST_OPTABS
/* Don't assume anything about startfiles. The linker script will load the
diff --git a/gcc/config/mips/ecoffl.h b/gcc/config/mips/ecoffl.h
index 9942152d32d..85663e95465 100644
--- a/gcc/config/mips/ecoffl.h
+++ b/gcc/config/mips/ecoffl.h
@@ -1,6 +1,6 @@
/* Definitions of target machine for GNU compiler. Little endian MIPS
version with GOFAST floating point library.
- Copyright (C) 1994, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1994 Free Software Foundation, Inc.
This file is part of GNU CC.
@@ -23,8 +23,6 @@ Boston, MA 02111-1307, USA. */
#define TARGET_ENDIAN_DEFAULT 0
-#include "mips/mips.h"
-#include "gofast.h"
#include "mips/ecoff.h"
#undef CPP_PREDEFINES
diff --git a/gcc/config/mips/elf.h b/gcc/config/mips/elf.h
index 52e80b387a7..51ca470dfa3 100644
--- a/gcc/config/mips/elf.h
+++ b/gcc/config/mips/elf.h
@@ -29,8 +29,6 @@ Boston, MA 02111-1307, USA. */
#endif
/* Mostly like ECOFF. */
-#include "mips/mips.h"
-#include "gofast.h"
#include "mips/ecoff.h"
/* We need to use .esize and .etype instead of .size and .type to
diff --git a/gcc/config/mips/elforion.h b/gcc/config/mips/elforion.h
index aa1a058b50d..4d90a4be4ad 100644
--- a/gcc/config/mips/elforion.h
+++ b/gcc/config/mips/elforion.h
@@ -1,6 +1,6 @@
/* Definitions of target machine for GNU compiler. MIPS ORION version with
GOFAST floating point library.
- Copyright (C) 1994, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1994 Free Software Foundation, Inc.
This file is part of GNU CC.
@@ -20,3 +20,5 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#define MIPS_CPU_STRING_DEFAULT "orion"
+
+#include "mips/elf64.h"
diff --git a/gcc/config/mips/gnu.h b/gcc/config/mips/gnu.h
index bf48bc4dbca..039e05cd820 100644
--- a/gcc/config/mips/gnu.h
+++ b/gcc/config/mips/gnu.h
@@ -94,9 +94,8 @@ Boston, MA 02111-1307, USA. */
#define MIPS_GNU
#undef CPP_PREDEFINES
-#define CPP_PREDEFINES "-Dmips -Acpu(mips) -Amachine(mips) \
--Dunix -Asystem(unix) -DMACH -Asystem(mach) -D__GNU__ -Asystem(gnu) \
--DMIPSEB -DR3000 -D_MIPSEB -D_R3000 \
+#define CPP_PREDEFINES GNU_CPP_PREDEFINES("mips") \
+"-DMIPSEB -DR3000 -D_MIPSEB -D_R3000 \
-D_MIPS_SZINT=32 -D_MIPS_SZLONG=32 -D_MIPS_SZPTR=32"
#undef LINK_SPEC
diff --git a/gcc/config/mips/iris3.h b/gcc/config/mips/iris3.h
index 1f690ffa466..8843d69dc81 100644
--- a/gcc/config/mips/iris3.h
+++ b/gcc/config/mips/iris3.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. Iris version.
- Copyright (C) 1991, 1993, 1995, 1996, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1991, 1993, 1995, 1996 Free Software Foundation, Inc.
This file is part of GNU CC.
@@ -70,3 +70,5 @@ Boston, MA 02111-1307, USA. */
/* Plain char is unsigned in the SGI compiler. */
#define DEFAULT_SIGNED_CHAR 0
+
+#include "mips/mips.h"
diff --git a/gcc/config/mips/iris4.h b/gcc/config/mips/iris4.h
index 7ca0459c625..be121a4ee7f 100644
--- a/gcc/config/mips/iris4.h
+++ b/gcc/config/mips/iris4.h
@@ -22,6 +22,8 @@ Boston, MA 02111-1307, USA. */
our own exit function. */
#define HAVE_ATEXIT
+#include "mips/iris3.h"
+
/* Profiling is supported via libprof1.a not -lc_p as in Irix 3. */
#undef STARTFILE_SPEC
#define STARTFILE_SPEC \
diff --git a/gcc/config/mips/iris4loser.h b/gcc/config/mips/iris4loser.h
index 426c822b68a..971bb53be20 100644
--- a/gcc/config/mips/iris4loser.h
+++ b/gcc/config/mips/iris4loser.h
@@ -3,3 +3,5 @@
#define SUBTARGET_MIPS_AS_ASM_SPEC "-O0 %{v}"
#define SUBTARGET_ASM_OPTIMIZING_SPEC ""
+
+#include "mips/iris4.h"
diff --git a/gcc/config/mips/iris5.h b/gcc/config/mips/iris5.h
index f81fe1c0fda..54cedc4fcd3 100644
--- a/gcc/config/mips/iris5.h
+++ b/gcc/config/mips/iris5.h
@@ -23,8 +23,6 @@ Boston, MA 02111-1307, USA. */
#endif
#define ABICALLS_ASM_OP ".option pic2"
-#include "mips/iris3.h"
-#include "mips/mips.h"
#include "mips/iris4.h"
/* Irix 5 doesn't use COFF, so disable special COFF handling in collect2.c. */
diff --git a/gcc/config/mips/iris5gas.h b/gcc/config/mips/iris5gas.h
index f1c2c483f88..adc90e83223 100644
--- a/gcc/config/mips/iris5gas.h
+++ b/gcc/config/mips/iris5gas.h
@@ -1,5 +1,7 @@
/* Definitions of target machine for GNU compiler. Irix version 5 with gas. */
+#include "mips/iris5.h"
+
/* Enable debugging. */
#define DBX_DEBUGGING_INFO
#define SDB_DEBUGGING_INFO
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index d9e39242e79..79b022b0d68 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -195,9 +195,9 @@ enum processor_type mips_cpu;
int mips_isa;
#ifdef MIPS_ABI_DEFAULT
-/* Which ABI to use. This is defined to a constant in mips.h if the target
+/* which ABI to use. This is defined to a constant in mips.h if the target
doesn't support multiple ABIs. */
-int mips_abi;
+enum mips_abi_type mips_abi;
#endif
/* Strings to hold which cpu and instruction set architecture to use. */
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 68c3051cce1..557fb09878c 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. MIPS version.
- Copyright (C) 1989, 90-97, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1989, 90-6, 1997 Free Software Foundation, Inc.
Contributed by A. Lichnewsky (lich@inria.inria.fr).
Changed by Michael Meissner (meissner@osf.org).
64 bit r4000 support by Ian Lance Taylor (ian@cygnus.com) and
@@ -75,20 +75,21 @@ enum processor_type {
/* Recast the cpu class to be the cpu attribute. */
#define mips_cpu_attr ((enum attr_cpu)mips_cpu)
-/* Which ABI to use. These are constants because abi64.h must check their
- value at preprocessing time. */
+/* Which ABI to use. This is only used by the Irix 6 port currently. */
-#define ABI_32 0
-#define ABI_N32 1
-#define ABI_64 2
-#define ABI_EABI 3
+enum mips_abi_type {
+ ABI_32,
+ ABI_N32,
+ ABI_64,
+ ABI_EABI
+};
#ifndef MIPS_ABI_DEFAULT
/* We define this away so that there is no extra runtime cost if the target
doesn't support multiple ABIs. */
#define mips_abi ABI_32
#else
-extern int mips_abi;
+extern enum mips_abi_type mips_abi;
#endif
/* Whether to emit abicalls code sequences or not. */
diff --git a/gcc/config/mips/news4.h b/gcc/config/mips/news4.h
index 502affa67c7..9f816c19258 100644
--- a/gcc/config/mips/news4.h
+++ b/gcc/config/mips/news4.h
@@ -37,3 +37,4 @@ Boston, MA 02111-1307, USA. */
program and data caches. */
#define CACHE_FLUSH_FUNC "cacheflush"
+#include "mips/mips.h"
diff --git a/gcc/config/mips/news5.h b/gcc/config/mips/news5.h
index a776064d193..53abce0e525 100644
--- a/gcc/config/mips/news5.h
+++ b/gcc/config/mips/news5.h
@@ -1,5 +1,4 @@
-/* Definitions of target machine for GNU compiler.
- Sony RISC NEWS (mips) System V version.
+/* Definitions of target machine for GNU compiler. Sony RISC NEWS (mips) System V version.
Copyright (C) 1992 Free Software Foundation, Inc.
This file is part of GNU CC.
@@ -60,3 +59,4 @@ Boston, MA 02111-1307, USA. */
#endif /* !_SC_PAGE_SIZE */
#endif /* L_trampoline */
+#include "mips/mips.h"
diff --git a/gcc/config/mips/osfrose.h b/gcc/config/mips/osfrose.h
index ee76053d9c4..f6901e85bcb 100644
--- a/gcc/config/mips/osfrose.h
+++ b/gcc/config/mips/osfrose.h
@@ -1,6 +1,6 @@
/* Definitions of target machine for GNU compiler.
DECstation (OSF/1 reference port with OSF/rose) version.
- Copyright (C) 1991, 1992, 1995, 1996, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1991, 1992, 1995, 1996 Free Software Foundation, Inc.
This file is part of GNU CC.
@@ -147,3 +147,5 @@ Boston, MA 02111-1307, USA. */
if (strcmp (lang_identify (), "c") != 0) \
output_lang_identify (STREAM); \
}
+
+#include "mips/mips.h"
diff --git a/gcc/config/mips/rtems64.h b/gcc/config/mips/rtems64.h
index bf374bac41e..6433ed56498 100644
--- a/gcc/config/mips/rtems64.h
+++ b/gcc/config/mips/rtems64.h
@@ -1,5 +1,5 @@
/* Definitions for rtems targeting a MIPS ORION using ecoff.
- Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1996, 1997 Free Software Foundation, Inc.
Contributed by Joel Sherrill (joel@OARcorp.com).
This file is part of GNU CC.
@@ -19,6 +19,8 @@ along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
+#include "mips/elforion.h"
+
/* Specify predefined symbols in preprocessor. */
#undef CPP_PREDEFINES
diff --git a/gcc/config/mips/sni-gas.h b/gcc/config/mips/sni-gas.h
index 5b3699820f3..752866536b8 100644
--- a/gcc/config/mips/sni-gas.h
+++ b/gcc/config/mips/sni-gas.h
@@ -1,3 +1,5 @@
+#include "mips/sni-svr4.h"
+
/* Enable debugging. */
#define DBX_DEBUGGING_INFO
#define SDB_DEBUGGING_INFO
@@ -36,3 +38,6 @@ do { \
assemble_name (FILE, LABEL2); \
fprintf (FILE, "\n"); \
} while (0)
+
+
+
diff --git a/gcc/config/mips/svr3-4.h b/gcc/config/mips/svr3-4.h
index 18303ac24ec..73402b26662 100644
--- a/gcc/config/mips/svr3-4.h
+++ b/gcc/config/mips/svr3-4.h
@@ -1,5 +1,4 @@
-/* Definitions of target machine for GNU compiler.
- MIPS RISC-OS System V version.
+/* Definitions of target machine for GNU compiler. MIPS RISC-OS System V version.
Copyright (C) 1991 Free Software Foundation, Inc.
This file is part of GNU CC.
@@ -61,3 +60,5 @@ Boston, MA 02111-1307, USA. */
/* Generate calls to memcpy, etc., not bcopy, etc. */
#define TARGET_MEM_FUNCTIONS
+
+#include "mips/mips.h"
diff --git a/gcc/config/mips/svr3-5.h b/gcc/config/mips/svr3-5.h
index 495b389989a..85bc0fc7fa7 100644
--- a/gcc/config/mips/svr3-5.h
+++ b/gcc/config/mips/svr3-5.h
@@ -1,6 +1,5 @@
-/* Definitions of target machine for GNU compiler.
- MIPS RISC-OS 5.0 System V version.
- Copyright (C) 1991, 1998 Free Software Foundation, Inc.
+/* Definitions of target machine for GNU compiler. MIPS RISC-OS 5.0 System V version.
+ Copyright (C) 1991 Free Software Foundation, Inc.
This file is part of GNU CC.
diff --git a/gcc/config/mips/svr4-4.h b/gcc/config/mips/svr4-4.h
index d1ba64de029..62b15910600 100644
--- a/gcc/config/mips/svr4-4.h
+++ b/gcc/config/mips/svr4-4.h
@@ -1,6 +1,5 @@
-/* Definitions of target machine for GNU compiler.
- MIPS RISC-OS System V.4 version.
- Copyright (C) 1992, 1998 Free Software Foundation, Inc.
+/* Definitions of target machine for GNU compiler. MIPS RISC-OS System V.4 version.
+ Copyright (C) 1992 Free Software Foundation, Inc.
This file is part of GNU CC.
@@ -59,3 +58,5 @@ Boston, MA 02111-1307, USA. */
/* Generate calls to memcpy, etc., not bcopy, etc. */
#define TARGET_MEM_FUNCTIONS
+
+#include "mips/mips.h"
diff --git a/gcc/config/mips/svr4-5.h b/gcc/config/mips/svr4-5.h
index 799e1cdf1e7..ad51f135da0 100644
--- a/gcc/config/mips/svr4-5.h
+++ b/gcc/config/mips/svr4-5.h
@@ -1,5 +1,4 @@
-/* Definitions of target machine for GNU compiler.
- MIPS RISC-OS 5.0 System V.4 version.
+/* Definitions of target machine for GNU compiler. MIPS RISC-OS 5.0 System V.4 version.
Copyright (C) 1992 Free Software Foundation, Inc.
This file is part of GNU CC.
diff --git a/gcc/config/mips/svr4-t.h b/gcc/config/mips/svr4-t.h
index b457aa5f07d..086519485a8 100644
--- a/gcc/config/mips/svr4-t.h
+++ b/gcc/config/mips/svr4-t.h
@@ -1,4 +1,5 @@
/* Definitions of target machine for GNU compiler. Tandem S2 w/ NonStop UX. */
+#include "mips/svr4-5.h"
/* Use the default value for this. */
#undef STANDARD_INCLUDE_DIR
diff --git a/gcc/config/mips/ultrix.h b/gcc/config/mips/ultrix.h
index d6da6a841a9..7fb101a9151 100644
--- a/gcc/config/mips/ultrix.h
+++ b/gcc/config/mips/ultrix.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler; DECstation (Ultrix) version.
- Copyright (C) 1991, 1997, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1991, 1997 Free Software Foundation, Inc.
This file is part of GNU CC.
@@ -31,12 +31,6 @@ Boston, MA 02111-1307, USA. */
#define LIB_SPEC "%{p:-lprof1} %{pg:-lprof1} -lc"
#endif
-#define SUBTARGET_CPP_SPEC "\
-%{.cc: -D__LANGUAGE_C -D_LANGUAGE_C} \
-%{.cxx: -D__LANGUAGE_C -D_LANGUAGE_C} \
-%{.C: -D__LANGUAGE_C -D_LANGUAGE_C} \
-"
-
#ifndef STARTFILE_SPEC
#define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}"
#endif
@@ -59,3 +53,5 @@ Boston, MA 02111-1307, USA. */
/* INITIALIZE_TRAMPOLINE calls this library function to flush
program and data caches. */
#define CACHE_FLUSH_FUNC "cacheflush"
+
+#include "mips/mips.h"
diff --git a/gcc/config/ns32k/xm-pc532-min.h b/gcc/config/ns32k/xm-pc532-min.h
index 7097d7e127a..a200792a0b2 100644
--- a/gcc/config/ns32k/xm-pc532-min.h
+++ b/gcc/config/ns32k/xm-pc532-min.h
@@ -1,3 +1,30 @@
+/* Configuration for GNU C-compiler for PC532 running Minix
+ Copyright (C) 1987,1990 Free Software Foundation, Inc.
+ Contributed by Jyrki Kuoppala <jkp@cs.hut.fi>, August 1990
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+/* We have USG-style include files and time functions */
+
+#define USG
+
+#include "ns32k/xm-ns32k.h"
+
#ifndef HZ
#define HZ 60
#endif
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 8574352e111..48bdc28fdb2 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -39,10 +39,6 @@ Boston, MA 02111-1307, USA. */
#include "except.h"
#include "function.h"
-#if HAVE_STDLIB_H
-# include <stdlib.h>
-#endif
-
#ifndef TARGET_NO_PROTOTYPE
#define TARGET_NO_PROTOTYPE 0
#endif
@@ -161,7 +157,7 @@ void
rs6000_override_options (default_cpu)
char *default_cpu;
{
- size_t i, j;
+ int i, j;
struct rs6000_cpu_select *ptr;
/* Simplify the entries below by making a mask for any POWER
@@ -245,7 +241,7 @@ rs6000_override_options (default_cpu)
MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}};
- size_t ptt_size = sizeof (processor_target_table) / sizeof (struct ptt);
+ int ptt_size = sizeof (processor_target_table) / sizeof (struct ptt);
int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */
int string = TARGET_STRING; /* save current -mstring/-mno-string status */
@@ -341,7 +337,7 @@ rs6000_file_start (file, default_cpu)
FILE *file;
char *default_cpu;
{
- size_t i;
+ int i;
char buffer[80];
char *start = buffer;
struct rs6000_cpu_select *ptr;
@@ -1084,18 +1080,7 @@ small_data_operand (op, mode)
return 0;
else
- {
- rtx sum = XEXP (op, 0);
- HOST_WIDE_INT summand;
-
- /* We have to be careful here, because it is the referenced address
- that must be 32k from _SDA_BASE_, not just the symbol. */
- summand = INTVAL (XEXP (sum, 1));
- if (summand < 0 || summand > g_switch_value)
- return 0;
-
- sym_ref = XEXP (sum, 0);
- }
+ sym_ref = XEXP (XEXP (op, 0), 0);
if (*XSTR (sym_ref, 0) != '@')
return 0;
@@ -1191,22 +1176,22 @@ init_cumulative_args (cum, fntype, libname, incoming)
For the AIX ABI structs are always stored left shifted in their
argument slot. */
-int
+enum direction
function_arg_padding (mode, type)
enum machine_mode mode;
tree type;
{
if (type != 0 && AGGREGATE_TYPE_P (type))
- return (int)upward;
+ return upward;
/* This is the default definition. */
return (! BYTES_BIG_ENDIAN
- ? (int)upward
+ ? upward
: ((mode == BLKmode
? (type && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
&& int_size_in_bytes (type) < (PARM_BOUNDARY / BITS_PER_UNIT))
: GET_MODE_BITSIZE (mode) < PARM_BOUNDARY)
- ? (int)downward : (int)upward));
+ ? downward : upward));
}
/* If defined, a C expression that gives the alignment boundary, in bits,
@@ -2225,9 +2210,6 @@ rs6000_replace_regno (x, from, reg)
}
return x;
-
- default:
- break;
}
fmt = GET_RTX_FORMAT (GET_CODE (x));
@@ -3882,6 +3864,7 @@ output_epilog (file, size)
rtx insn = get_last_insn ();
int sp_reg = 1;
int sp_offset = 0;
+ int i;
/* If the last insn was a BARRIER, we don't have to write anything except
the trace table. */
@@ -4952,6 +4935,9 @@ rs6000_longcall_ref (call_ref)
rtx call_ref;
{
char *call_name;
+ int len;
+ char *p;
+ rtx reg1, reg2;
tree node;
if (GET_CODE (call_ref) != SYMBOL_REF)
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index d37d17437f0..6eefaba2f86 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -1468,7 +1468,7 @@ typedef struct rs6000_args
padding. */
#define FUNCTION_ARG_PADDING(MODE, TYPE) \
- (enum direction) function_arg_padding (MODE, TYPE)
+ function_arg_padding (MODE, TYPE)
/* If defined, a C expression that gives the alignment boundary, in bits,
of an argument with the specified mode and type. If it is not defined,
@@ -2754,26 +2754,26 @@ extern char rs6000_reg_names[][8]; /* register names (0 vs. %r0). */
/* Table of additional register names to use in user input. */
#define ADDITIONAL_REGISTER_NAMES \
- {{"r0", 0}, {"r1", 1}, {"r2", 2}, {"r3", 3}, \
- {"r4", 4}, {"r5", 5}, {"r6", 6}, {"r7", 7}, \
- {"r8", 8}, {"r9", 9}, {"r10", 10}, {"r11", 11}, \
- {"r12", 12}, {"r13", 13}, {"r14", 14}, {"r15", 15}, \
- {"r16", 16}, {"r17", 17}, {"r18", 18}, {"r19", 19}, \
- {"r20", 20}, {"r21", 21}, {"r22", 22}, {"r23", 23}, \
- {"r24", 24}, {"r25", 25}, {"r26", 26}, {"r27", 27}, \
- {"r28", 28}, {"r29", 29}, {"r30", 30}, {"r31", 31}, \
- {"fr0", 32}, {"fr1", 33}, {"fr2", 34}, {"fr3", 35}, \
- {"fr4", 36}, {"fr5", 37}, {"fr6", 38}, {"fr7", 39}, \
- {"fr8", 40}, {"fr9", 41}, {"fr10", 42}, {"fr11", 43}, \
- {"fr12", 44}, {"fr13", 45}, {"fr14", 46}, {"fr15", 47}, \
- {"fr16", 48}, {"fr17", 49}, {"fr18", 50}, {"fr19", 51}, \
- {"fr20", 52}, {"fr21", 53}, {"fr22", 54}, {"fr23", 55}, \
- {"fr24", 56}, {"fr25", 57}, {"fr26", 58}, {"fr27", 59}, \
- {"fr28", 60}, {"fr29", 61}, {"fr30", 62}, {"fr31", 63}, \
- /* no additional names for: mq, lr, ctr, ap */ \
- {"cr0", 68}, {"cr1", 69}, {"cr2", 70}, {"cr3", 71}, \
- {"cr4", 72}, {"cr5", 73}, {"cr6", 74}, {"cr7", 75}, \
- {"cc", 68}, {"sp", 1}, {"toc", 2} }
+ {"r0", 0, "r1", 1, "r2", 2, "r3", 3, \
+ "r4", 4, "r5", 5, "r6", 6, "r7", 7, \
+ "r8", 8, "r9", 9, "r10", 10, "r11", 11, \
+ "r12", 12, "r13", 13, "r14", 14, "r15", 15, \
+ "r16", 16, "r17", 17, "r18", 18, "r19", 19, \
+ "r20", 20, "r21", 21, "r22", 22, "r23", 23, \
+ "r24", 24, "r25", 25, "r26", 26, "r27", 27, \
+ "r28", 28, "r29", 29, "r30", 30, "r31", 31, \
+ "fr0", 32, "fr1", 33, "fr2", 34, "fr3", 35, \
+ "fr4", 36, "fr5", 37, "fr6", 38, "fr7", 39, \
+ "fr8", 40, "fr9", 41, "fr10", 42, "fr11", 43, \
+ "fr12", 44, "fr13", 45, "fr14", 46, "fr15", 47, \
+ "fr16", 48, "fr17", 49, "fr18", 50, "fr19", 51, \
+ "fr20", 52, "fr21", 53, "fr22", 54, "fr23", 55, \
+ "fr24", 56, "fr25", 57, "fr26", 58, "fr27", 59, \
+ "fr28", 60, "fr29", 61, "fr30", 62, "fr31", 63, \
+ /* no additional names for: mq, lr, ctr, ap */ \
+ "cr0", 68, "cr1", 69, "cr2", 70, "cr3", 71, \
+ "cr4", 72, "cr5", 73, "cr6", 74, "cr7", 75, \
+ "cc", 68, "sp", 1, "toc", 2 }
/* How to renumber registers for dbx and gdb. */
@@ -3100,7 +3100,6 @@ extern struct rtx_def *rs6000_float_const ();
extern struct rtx_def *rs6000_immed_double_const ();
extern struct rtx_def *rs6000_got_register ();
extern int direct_return ();
-extern int get_issue_rate ();
extern int any_operand ();
extern int short_cint_operand ();
extern int u_short_cint_operand ();
@@ -3120,7 +3119,6 @@ extern int offsettable_addr_operand ();
extern int mem_or_easy_const_operand ();
extern int add_operand ();
extern int non_add_cint_operand ();
-extern int non_logical_cint_operand ();
extern int logical_operand ();
extern int non_logical_operand ();
extern int mask_constant ();
@@ -3176,14 +3174,12 @@ extern int rs6000_adjust_cost ();
extern void rs6000_trampoline_template ();
extern int rs6000_trampoline_size ();
extern void rs6000_initialize_trampoline ();
-extern void rs6000_output_load_toc_table ();
extern int rs6000_comp_type_attributes ();
extern int rs6000_valid_decl_attribute_p ();
extern int rs6000_valid_type_attribute_p ();
extern void rs6000_set_default_type_attributes ();
extern struct rtx_def *rs6000_dll_import_ref ();
extern struct rtx_def *rs6000_longcall_ref ();
-extern int function_arg_padding ();
/* See nonlocal_goto_receiver for when this must be set. */
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 9bd5afd6959..8e5c122e680 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -1602,19 +1602,17 @@
rtx label = 0;
if (! TARGET_POWER)
- {
- if (! TARGET_POWERPC)
- {
- emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]);
- emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]);
- emit_insn (gen_divus_call ());
- emit_move_insn (operands[0], gen_rtx (REG, SImode, 3));
- emit_move_insn (operands[3], gen_rtx (REG, SImode, 4));
- DONE;
- }
- else
- FAIL;
- }
+ if (! TARGET_POWERPC)
+ {
+ emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]);
+ emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]);
+ emit_insn (gen_divus_call ());
+ emit_move_insn (operands[0], gen_rtx (REG, SImode, 3));
+ emit_move_insn (operands[3], gen_rtx (REG, SImode, 4));
+ DONE;
+ }
+ else
+ FAIL;
if (GET_CODE (operands[2]) != CONST_INT || INTVAL (operands[2]) < 0)
{
diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h
index f6660300ca3..1fdd2f032d8 100644
--- a/gcc/config/rs6000/sysv4.h
+++ b/gcc/config/rs6000/sysv4.h
@@ -332,11 +332,6 @@ do { \
/* Put jump tables in read-only memory, rather than in .text. */
#undef JUMP_TABLES_IN_TEXT_SECTION
-/* Disable AIX-ism that disables turning -B into -L if the argument specifies a
- relative file name. This breaks setting GCC_EXEC_PREFIX to D:\path under
- Windows. */
-#undef RELATIVE_PREFIX_NOT_LINKDIR
-
/* Undefine some things which are defined by the generic svr4.h. */
#undef ASM_FILE_END
diff --git a/gcc/config/rs6000/xm-cygwin32.h b/gcc/config/rs6000/xm-cygwin32.h
index ca548319c10..677254b371c 100644
--- a/gcc/config/rs6000/xm-cygwin32.h
+++ b/gcc/config/rs6000/xm-cygwin32.h
@@ -1 +1,26 @@
+/* Configuration for GNU C-compiler for hosting on Windows NT.
+ using a unix style C library.
+ Copyright (C) 1995, 1997 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING. If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+
+#define NO_STAB_H
+
+#include "rs6000/xm-rs6000.h"
+
#define EXECUTABLE_SUFFIX ".exe"
diff --git a/gcc/config/rs6000/xm-mach.h b/gcc/config/rs6000/xm-mach.h
index 2d4ee5d21ce..105a59d67f4 100644
--- a/gcc/config/rs6000/xm-mach.h
+++ b/gcc/config/rs6000/xm-mach.h
@@ -1,2 +1,25 @@
+/* Configuration for GNU C-compiler for IBM RS/6000 on MACH.
+ Copyright (C) 1992 Free Software Foundation, Inc.
+ Contributed by Richard Kenner (kenner@nyu.edu).
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+
+#include "rs6000/xm-rs6000.h"
#undef USG
#undef COLLECT_EXPORT_LIST
diff --git a/gcc/config/rs6000/xm-sysv4.h b/gcc/config/rs6000/xm-sysv4.h
index 2a09788ae9d..bc8f4bf299b 100644
--- a/gcc/config/rs6000/xm-sysv4.h
+++ b/gcc/config/rs6000/xm-sysv4.h
@@ -1,5 +1,5 @@
/* Configuration for GNU C-compiler for PowerPC running System V.4.
- Copyright (C) 1995, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1995 Free Software Foundation, Inc.
Cloned from sparc/xm-sysv4.h by Michael Meissner (meissner@cygnus.com).
@@ -46,6 +46,8 @@ Boston, MA 02111-1307, USA. */
#define SUCCESS_EXIT_CODE 0
#define FATAL_EXIT_CODE 33
+#include "xm-svr4.h"
+
/* if not compiled with GNU C, use the C alloca and use only int bitfields. */
#ifndef __GNUC__
#define USE_C_ALLOCA
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 8641d61728f..e3f5ab414c8 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -5084,14 +5084,14 @@ sparc_type_code (type)
register tree type;
{
register unsigned long qualifiers = 0;
- register unsigned shift;
+ register unsigned shift = 6;
/* Only the first 30 bits of the qualifier are valid. We must refrain from
setting more, since some assemblers will give an error for this. Also,
we must be careful to avoid shifts of 32 bits or more to avoid getting
unpredictable results. */
- for (shift = 6; shift < 30; shift += 2, type = TREE_TYPE (type))
+ for (;;)
{
switch (TREE_CODE (type))
{
@@ -5099,18 +5099,27 @@ sparc_type_code (type)
return qualifiers;
case ARRAY_TYPE:
- qualifiers |= (3 << shift);
+ if (shift < 30)
+ qualifiers |= (3 << shift);
+ shift += 2;
+ type = TREE_TYPE (type);
break;
case FUNCTION_TYPE:
case METHOD_TYPE:
- qualifiers |= (2 << shift);
+ if (shift < 30)
+ qualifiers |= (2 << shift);
+ shift += 2;
+ type = TREE_TYPE (type);
break;
case POINTER_TYPE:
case REFERENCE_TYPE:
case OFFSET_TYPE:
- qualifiers |= (1 << shift);
+ if (shift < 30)
+ qualifiers |= (1 << shift);
+ shift += 2;
+ type = TREE_TYPE (type);
break;
case RECORD_TYPE:
@@ -5130,7 +5139,10 @@ sparc_type_code (type)
/* If this is a range type, consider it to be the underlying
type. */
if (TREE_TYPE (type) != 0)
- break;
+ {
+ type = TREE_TYPE (type);
+ break;
+ }
/* Carefully distinguish all the standard types of C,
without messing up if the language is not C. We do this by
@@ -5156,11 +5168,6 @@ sparc_type_code (type)
return (qualifiers | (TREE_UNSIGNED (type) ? 15 : 5));
case REAL_TYPE:
- /* If this is a range type, consider it to be the underlying
- type. */
- if (TREE_TYPE (type) != 0)
- break;
-
/* Carefully distinguish all the standard types of C,
without messing up if the language is not C. */
@@ -5187,8 +5194,6 @@ sparc_type_code (type)
abort (); /* Not a type! */
}
}
-
- return qualifiers;
}
/* Nested function support. */
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index db314ebf383..d839432e766 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler, for Sun SPARC.
- Copyright (C) 1987, 88, 89, 92, 94-97, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1987, 88, 89, 92, 94-6, 1997 Free Software Foundation, Inc.
Contributed by Michael Tiemann (tiemann@cygnus.com).
64 bit SPARC V9 support by Michael Tiemann, Jim Wilson, and Doug Evans,
at Cygnus Support.
@@ -2136,8 +2136,9 @@ extern struct rtx_def *sparc_builtin_saveregs ();
is defined, then all arguments are treated as named. Otherwise, all named
arguments except the last are treated as named.
For the v9 we want NAMED to mean what it says it means. */
-
-#define STRICT_ARGUMENT_NAMING TARGET_V9
+/* ??? This needn't be set for v8, but I don't want to make this runtime
+ selectable if I don't have to. */
+#define STRICT_ARGUMENT_NAMING
/* Generate RTL to flush the register windows so as to make arbitrary frames
available. */
@@ -2958,8 +2959,7 @@ do { \
ASM_OUTPUT_ALIGN (FILE, sparc_align_jumps)
#define ASM_OUTPUT_LOOP_ALIGN(FILE) \
- if (sparc_align_loops >= 2) \
- fprintf ((FILE), "\t.align %d, 0x01000000\n", 1 << sparc_align_loops)
+ ASM_OUTPUT_ALIGN (FILE, sparc_align_loops)
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
fprintf (FILE, "\t.skip %u\n", (SIZE))
diff --git a/gcc/config/sparc/xm-linux.h b/gcc/config/sparc/xm-linux.h
index 691c7d16784..f68f5715662 100644
--- a/gcc/config/sparc/xm-linux.h
+++ b/gcc/config/sparc/xm-linux.h
@@ -24,3 +24,5 @@ Boston, MA 02111-1307, USA. */
#include <stdlib.h>
#include <string.h>
#endif
+
+#include <xm-linux.h>
diff --git a/gcc/config/sparc/xm-sol2.h b/gcc/config/sparc/xm-sol2.h
index 5613b086b57..a799f12b946 100644
--- a/gcc/config/sparc/xm-sol2.h
+++ b/gcc/config/sparc/xm-sol2.h
@@ -1,3 +1,5 @@
+#include "sparc/xm-sysv4.h"
+
/* If not compiled with GNU C, include the system's <alloca.h> header. */
#ifndef __GNUC__
#include <alloca.h>
diff --git a/gcc/config/sparc/xm-sysv4.h b/gcc/config/sparc/xm-sysv4.h
index 6e663d12cfa..e72c49922fd 100644
--- a/gcc/config/sparc/xm-sysv4.h
+++ b/gcc/config/sparc/xm-sysv4.h
@@ -1,6 +1,7 @@
/* Configuration for GNU C-compiler for Sun Sparc running System V.4.
- Copyright (C) 1992, 1993, 1998 Free Software Foundation, Inc.
- Contributed by Ron Guilmette (rfg@netcom.com).
+ Copyright (C) 1992, 1993 Free Software Foundation, Inc.
+
+ Written by Ron Guilmette (rfg@netcom.com).
This file is part of GNU CC.
@@ -43,6 +44,8 @@ Boston, MA 02111-1307, USA. */
#define SUCCESS_EXIT_CODE 0
#define FATAL_EXIT_CODE 33
+#include "xm-svr4.h"
+
#ifndef __GNUC__
#define ONLY_INT_FIELDS
#endif
diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c
index bac442a467d..ad10c08cbcf 100644
--- a/gcc/config/vax/vax.c
+++ b/gcc/config/vax/vax.c
@@ -1,5 +1,5 @@
/* Subroutines for insn-output.c for Vax.
- Copyright (C) 1987, 1994, 1995, 1997, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1987, 1994, 1995, 1997 Free Software Foundation, Inc.
This file is part of GNU CC.
@@ -614,36 +614,34 @@ check_float_value (mode, d, overflow)
if (overflow)
{
- bcopy ((char *) &float_values[0], (char *) d, sizeof (REAL_VALUE_TYPE));
+ bcopy (&float_values[0], d, sizeof (REAL_VALUE_TYPE));
return 1;
}
if ((mode) == SFmode)
{
REAL_VALUE_TYPE r;
- bcopy ((char *) d, (char *) &r, sizeof (REAL_VALUE_TYPE));
+ bcopy (d, &r, sizeof (REAL_VALUE_TYPE));
if (REAL_VALUES_LESS (float_values[0], r))
{
- bcopy ((char *) &float_values[0], (char *) d,
- sizeof (REAL_VALUE_TYPE));
+ bcopy (&float_values[0], d, sizeof (REAL_VALUE_TYPE));
return 1;
}
else if (REAL_VALUES_LESS (r, float_values[1]))
{
- bcopy ((char *) &float_values[1], (char*) d,
- sizeof (REAL_VALUE_TYPE));
+ bcopy (&float_values[1], d, sizeof (REAL_VALUE_TYPE));
return 1;
}
else if (REAL_VALUES_LESS (dconst0, r)
&& REAL_VALUES_LESS (r, float_values[2]))
{
- bcopy ((char *) &dconst0, (char *) d, sizeof (REAL_VALUE_TYPE));
+ bcopy (&dconst0, d, sizeof (REAL_VALUE_TYPE));
return 1;
}
else if (REAL_VALUES_LESS (r, dconst0)
&& REAL_VALUES_LESS (float_values[3], r))
{
- bcopy ((char *) &dconst0, (char *) d, sizeof (REAL_VALUE_TYPE));
+ bcopy (&dconst0, d, sizeof (REAL_VALUE_TYPE));
return 1;
}
}