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Backport from trunk r217753.
2014-11-19 Jakub Jelinek <jakub@redhat.com>
gcc/
PR rtl-optimization/63843
* simplify-rtx.c (simplify_binary_operation_1) <case ASHIFTRT>: For
optimization of ashiftrt of subreg of lshiftrt, check that code
is ASHIFTRT.
2014-11-19 Jakub Jelinek <jakub@redhat.com>
gcc/testsuite
PR rtl-optimization/63843
* gcc.c-torture/execute/pr63843.c: New test.
Change-Id: I8282cd08702404e60c9b49fb8b49aedf26bd694e
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@222158 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@222155 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r220348.
2015-02-02 Tejas Belagod <tejas.belagod@arm.com>
Andrew Pinski <pinskia@gcc.gnu.org>
Jakub Jelinek <jakub@gcc.gnu.org>
PR target/64231
* config/aarch64/aarch64.c (aarch64_classify_symbol): Fix large
integer typing for small model. Use IN_RANGE.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@222119 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r220399, r220413.
2015-02-04 Matthew Wahab <matthew.wahab@arm.com>
* config/aarch64/aarch64-cores.def: Add cortex-a72 and
cortex-a72.cortex-a53.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi (AArch64 Options/-mtune): Add "cortex-a72".
2015-02-04 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm-cores.def: Add cortex-a72 and
cortex-a72.cortex-a53.
* config/arm/bpabi.h (BE8_LINK_SPEC): Likewise.
* config/arm/t-aprofile (MULTILIB_MATCHES): Likewise.
* config/arm/arm-tune.md: Regenerate.
* config/arm/arm-tables.opt: Add entries for "cortex-a72" and
"cortex-a72.cortex-a53".
* doc/invoke.texi (ARM Options/-mtune): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@222113 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r219724, 219746, r220103.
2014-01-25 James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/arm-cores.def (cortex-a57): Use the new Cortex-A57
pipeline model.
config/arm/arm.md: Include the new Cortex-A57 model.
(generic_sched): Don't use generic_sched when tuning for
Cortex-A57.
2015-01-16 James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/cortex-a57.md: Remove duplicate of file accidentally
introduced in revision 219724.
2015-01-16 James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/cortex-a57.md: New.
* config/aarch64/aarch64.md: Include it.
* config/aarch64/aarch64-cores.def (cortex-a57): Tune for it.
* config/aarch64/aarch64-tune.md: Regenerate.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@222066 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@222048 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221988 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r218145, r218146, r219472.
2014-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.md (generic_sched): Specify cortexa17 in 'no' list.
Include cortex-a17.md.
* config/arm/arm.c (arm_issue_rate): Specify 2 for cortexa17.
* config/arm/arm-cores.def (cortex-a17): New entry.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
* config/arm/bpabi.h (BE8_LINK_SPEC): Specify mcpu=cortex-a17.
* config/arm/cortex-a17.md: New file.
* config/arm/cortex-a17-neon.md: New file.
* config/arm/driver-arm.c (arm_cpu_table): Add entry for cortex-a17.
* config/arm/t-aprofile: Add cortex-a17 entries to MULTILIB_MATCHES.
2014-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm-cores.def (cortex-a17.cortex-a7): New entry.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
* config/arm/bpabi.h (BE8_LINK_SPEC): Add mcpu=cortex-a17.cortex-a7.
* config/arm/t-aprofile: Add cortex-a17.cortex-a7 entry to
MULTILIB_MATCHES.
2015-01-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.c (arm_cortex_a12_tune): Update entries to match
Cortex-A17 tuning parameters.
* config/arm/arm-cores.def (cortex-a12): Schedule for cortex-a17.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221977 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221950 138bc75d-0d04-0410-961f-82ee72b054a4
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Fix partial backport done at r221911.
* gcc/config/aarch64/aarch64.c: Fix cost tables for APM XGene-1
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221946 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r219745.
2015-01-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR target/64263
* config/aarch64/aarch64.md (*movsi_aarch64): Don't split if the
destination is not a GP reg.
(*movdi_aarch64): Likewise.
2015-04-09 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
Backport from trunk r219745.
2015-01-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/64263
* gcc.target/aarch64/pr64263_1.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221936 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r219578.
2015-01-14 Joey Ye <joey.ye@arm.com>
* config/arm/arm.c (arm_compute_save_reg_mask):
Do not save lr in case of tail call.
* config/arm/thumb2.md (*thumb2_pop_single): New pattern.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221935 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r219544.
2015-01-13 Renlin Li <renlin.li@arm.com>
* config/arm/arm.h (CLZ_DEFINED_VALUE_AT_ZERO): Return 2.
(CTZ_DEFINED_VALUE_AT_ZERO): Ditto
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221934 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221924 138bc75d-0d04-0410-961f-82ee72b054a4
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and r219679 into one entry.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221923 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r216672.
* config/aarch64/arm_neon.h (__LD2_LANE_FUNC): Rewrite using builtins,
update uses to use new macro arguments.
(__LD3_LANE_FUNC): Likewise.
(__LD4_LANE_FUNC): Likewise.
2015-04-08 Charles Baylis <charles.baylis@linaro.org>
Backport from trunk r216671.
2014-10-24 Charles Baylis <charles.baylis@linaro.org>
* config/aarch64/aarch64-builtins.c
(aarch64_types_loadstruct_lane_qualifiers): Define.
* config/aarch64/aarch64-simd-builtins.def (ld2_lane, ld3_lane,
ld4_lane): New builtins.
* config/aarch64/aarch64-simd.md (aarch64_vec_load_lanesoi_lane<mode>):
New pattern.
(aarch64_vec_load_lanesci_lane<mode>): Likewise.
(aarch64_vec_load_lanesxi_lane<mode>): Likewise.
(aarch64_ld2_lane<mode>): New expand.
(aarch64_ld3_lane<mode>): Likewise.
(aarch64_ld4_lane<mode>): Likewise.
* config/aarch64/aarch64.md (define_c_enum "unspec"): Add
UNSPEC_LD2_LANE, UNSPEC_LD3_LANE, UNSPEC_LD4_LANE.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221915 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r219679.
2015-01-15 Richard Earnshaw <rearnsha@arm.com>
* arm.c (arm_xgene_tune): Add default initializer for instruction
fusion.
2015-04-07 Michael Collison <michael.collison@linaro.org>
Backport from trunk r219661.
2015-01-15 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* config/arm/arm.md (generic_sched): Specify xgene1 in 'no' list.
Include xgene1.md.
* config/arm/arm.c (arm_issue_rate): Specify 4 for xgene1.
* config/arm/arm-cores.def (xgene1): New entry.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
* config/arm/bpabi.h (BE8_LINK_SPEC): Specify mcpu=xgene1.
2015-04-07 Michael Collison <michael.collison@linaro.org>
Backport from trunk r219657.
2015-01-15 Philipp Tomsich <ptomsich@theobroma-systems.com>
* config/aarch64/aarch64.md: Include xgene1.md.
* config/aarch64/xgene1.md: New file.
2015-04-07 Michael Collison <michael.collison@linaro.org>
Backport from trunk r219656.
2015-01-15 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* config/aarch64/aarch64-cores.def (xgene1): Update/add the
xgene1 (APM XGene-1) core definition.
* gcc/config/aarch64/aarch64.c: Add cost tables for APM XGene-1
* config/arm/aarch-cost-tables.h: Add cost tables for APM XGene-1
* doc/invoke.texi: Document -mcpu=xgene1.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221911 138bc75d-0d04-0410-961f-82ee72b054a4
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2015-04-07 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r217062, r217646, r218658.
2014-12-12 Zhenqiang Chen <zhenqiang.chen@arm.com>
PR rtl-optimization/63917
* ifcvt.c (cc_in_cond): New function.
(end_ifcvt_sequence): Make sure new generated insns do not clobber CC.
(noce_process_if_block, check_cond_move_block): Check CC references.
2014-11-17 Zhenqiang Chen <zhenqiang.chen@arm.com>
* ifcvt.c (HAVE_cbranchcc4): Define.
(noce_emit_cmove, noce_get_alt_condition, noce_get_condition):
Use HAVE_cbranchcc4.
2014-11-04 Zhenqiang Chen <zhenqiang.chen@arm.com>
Revert:
2014-11-03 Zhenqiang Chen <zhenqiang.chen@arm.com>
* ifcvt.c (noce_emit_cmove, noce_get_alt_condition, noce_get_condition):
Allow CC mode if HAVE_cbranchcc4.
gcc/testsuite/
2015-04-07 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r218658.
2014-12-12 Zhenqiang Chen <zhenqiang.chen@arm.com>
* gcc.dg/pr64007.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221894 138bc75d-0d04-0410-961f-82ee72b054a4
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* gcc/testsuite/gcc.dg/pr64935-1.c: Ignore warnings that can't be
disabled with not-yet-existing -Wno-shift-count-overflow.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221832 138bc75d-0d04-0410-961f-82ee72b054a4
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2015-04-02 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r218958, r218960, r218961.
2014-12-19 Alan Lawrence <alan.lawrence@arm.com>
* config/aarch64/aarch64.c (<LOGICAL:optab>_one_cmpl<mode>3):
Reparameterize to...
(<NLOGICAL:optab>_one_cmpl<mode>3): with extra SIMD-register variant.
(xor_one_cmpl<mode>3): New define_insn_and_split.
* config/aarch64/iterators.md (NLOGICAL): New define_code_iterator.
2014-12-19 Alan Lawrence <alan.lawrence@arm.com>
* config/aarch64/aarch64.md (<optab><mode>3, one_cmpl<mode>2):
Add SIMD-register variant.
* config/aarch64/iterators.md (Vbtype): Add value for SI.
2014-12-19 Alan Lawrence <alan.lawrence@arm.com>
* config/aarch64/aarch64.md (subdi3, adddi3_aarch64): Don't penalize
SIMD reg variant.
gcc/testsuite/
2015-04-02 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r218961.
2014-12-19 Alan Lawrence <alan.lawrence@arm.com>
* gcc.target/aarch64/eon_1.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221829 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r218897.
2014-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* doc/invoke.texi (ARM options): Remove mention of Advanced RISC
Machines.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221827 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r218895.
2014-12-19 Xingxing Pan <xxingpan@marvell.com>
* config/arm/cortex-a9-neon.md (cortex_a9_neon_vmov): Change
reservation to cortex_a9_neon_dp.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221826 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221825 138bc75d-0d04-0410-961f-82ee72b054a4
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2015-04-02 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r218530.
2014-12-09 Alan Lawrence <alan.lawrence@arm.com>
* config/aarch64/aarch64.md (absdi2): Remove scratch operand by
earlyclobbering result operand.
* config/aarch64/aarch64-builtins.c (aarch64_types_unop_qualifiers):
Remove final qualifier_internal.
(aarch64_fold_builtin): Stop folding abs builtins, except on floats.
gcc/testsuite/
2015-04-02 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r218530.
2014-12-09 Alan Lawrence <alan.lawrence@arm.com>
* gcc.target/aarch64/vabs_intrinsic_2.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221824 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r218526.
2014-12-09 Wilco Dijkstra <wilco.dijkstra@arm.com>
* gcc/config/aarch64/aarch64-protos.h (tune-params): Add reasociation
tuning parameters.
* gcc/config/aarch64/aarch64.c (TARGET_SCHED_REASSOCIATION_WIDTH):
Define.
(aarch64_reassociation_width): New function.
(generic_tunings): Add reassociation tuning parameters.
(cortexa53_tunings): Likewise.
(cortexa57_tunings): Likewise.
(thunderx_tunings): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221823 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r218866.
2014-12-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
* gcc/config/aarch64/aarch64.c (TARGET_MIN_DIVISIONS_FOR_RECIP_MUL):
Define.
(aarch64_min_divisions_for_recip_mul): New function.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221822 138bc75d-0d04-0410-961f-82ee72b054a4
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2015-04.02 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r218867, r218868.
2014-12-18 Alan Lawrence <alan.lawrence@arm.com>
* config/aarch64/aarch64-simd.md (aarch64_lshr_simddi): Handle shift
by 64 by moving const0_rtx.
(aarch64_ushr_simddi): Delete.
* config/aarch64/aarch64.md (enum unspec): Delete UNSPEC_USHR64.
2014-12-18 Alan Lawrence <alan.lawrence@arm.com>
* config/aarch64/aarch64.md (enum "unspec"): Remove UNSPEC_SSHR64.
* config/aarch64/aarch64-simd.md (aarch64_ashr_simddi): Change shift
amount to 63 if was 64.
(aarch64_sshr_simddi): Remove.
gcc/testsuite/
2015-04-02 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r218868.
2014-12-18 Alan Lawrence <alan.lawrence@arm.com>
* gcc.target/aarch64/ushr64_1.c: Remove scan-assembler "ushr...64".
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221821 138bc75d-0d04-0410-961f-82ee72b054a4
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2015-04.02 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r218855.
2014-12-18 Bin Cheng <bin.cheng@arm.com>
PR tree-optimization/62178
* tree-ssa-loop-ivopts.c (cheaper_cost_with_cand): New function.
(iv_ca_replace): New function.
(try_improve_iv_set): New parameter try_replace_p.
Break local optimal fixed-point by calling iv_ca_replace.
(find_optimal_iv_set_1): Pass new argument to try_improve_iv_set.
gcc/testsuite/
2015-04:02 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r218855.
2014-12-18 Bin Cheng <bin.cheng@arm.com>
PR tree-optimization/62178
* gcc.target/aarch64/pr62178.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221820 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r218829.
2014-12-17 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/aarch64.md (generic_sched): Delete it.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221819 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221779 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r219470.
2015-01-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm-protos.h (tune_params): Add fuseable_ops field.
* config/arm/arm.c (arm_macro_fusion_p): New function.
(arm_macro_fusion_pair_p): Likewise.
(TARGET_SCHED_MACRO_FUSION_P): Define.
(TARGET_SCHED_MACRO_FUSION_PAIR_P): Likewise.
(ARM_FUSE_NOTHING): Likewise.
(ARM_FUSE_MOVW_MOVT): Likewise.
(arm_slowmul_tune, arm_fastmul_tune, arm_strongarm_tune,
arm_xscale_tune, arm_9e_tune, arm_v6t2_tune, arm_cortex_tune,
arm_cortex_a8_tune, arm_cortex_a7_tune, arm_cortex_a15_tune,
arm_cortex_a53_tune, arm_cortex_a57_tune, arm_cortex_a9_tune,
arm_cortex_a12_tune, arm_v7m_tune, arm_v6m_tune, arm_fa726te_tune
arm_cortex_a5_tune): Specify fuseable_ops value.
2015-03-27 Michael Collison <michael.collison@linaro.org>
Backport from trunk r218635.
2014-12-11 Renlin Li <renlin.li@arm.com>
* config/aarch64/aarch64-cores.def: Change all AARCH64_FL_FPSIMD to
AARCH64_FL_FOR_ARCH8.
* config/aarch64/aarch64.c (all_cores): Use FLAGS from
aarch64-cores.def file only.
2015-03-27 Michael Collison <michael.collison@linaro.org>
Backport from trunk r218432.
2014-12-05 Renlin Li <renlin.li@arm.com>
* config/aarch64/aarch64-opts.h (AARCH64_CORE): Rename IDENT to SCHED.
* config/aarch64/aarch64.h (AARCH64_CORE): Likewise.
* config/aarch64/aarch64.c (AARCH64_CORE): Rename X to IDENT,
IDENT to SCHED.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221746 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r220808.
2015-02-19 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
* haifa-sched.c (enum rfs_decision, rfs_str): Remove RFS_DEBUG.
(rank_for_schedule_debug): Update.
(ready_sort): Make static. Move sorting logic to ...
(ready_sort_debug, ready_sort_real): New static functions.
(schedule_block): Sort both debug insns and real insns in preparation
for ready list trimming. Improve debug output.
* sched-int.h (ready_sort): Remove global declaration.
Backport from trunk r220316.
2015-02-01 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
* haifa-sched.c (INSN_RFS_DEBUG_ORIG_ORDER): New access macro.
(rank_for_schedule_debug): Split from ...
(rank_for_schedule): ... this.
(ready_sort): Sort DEBUG_INSNs separately from normal INSNs.
* sched-int.h (struct _haifa_insn_data): New field rfs_debug_orig_order.
Backport from trunk r219893.
2015-01-20 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
* config/arm/arm-protos.h (enum arm_sched_autopref): New constants.
(struct tune_params): Use the enum.
* arm.c (arm_*_tune): Update.
(arm_option_override): Update.
Backport from trunk r219789.
* config/arm/arm-protos.h (struct tune_params): New field
sched_autopref_queue_depth.
* config/arm/arm.c (sched-int.h): Include header.
(arm_first_cycle_multipass_dfa_lookahead_guard,)
(TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD): Define hook.
(arm_slowmul_tune, arm_fastmul_tune, arm_strongarm_tune,)
(arm_xscale_tune, arm_9e_tune, arm_v6t2_tune, arm_cortex_tune,)
(arm_cortex_a8_tune, arm_cortex_a7_tune, arm_cortex_a15_tune,)
(arm_cortex_a53_tune, arm_cortex_a57_tune, arm_xgene1_tune,)
(arm_cortex_a5_tune, arm_cortex_a9_tune, arm_cortex_a12_tune,)
(arm_v7m_tune, arm_cortex_m7_tune, arm_v6m_tune, arm_fa726te_tune):
Specify sched_autopref_queue_depth value. Enabled for A15 and A57.
* config/arm/t-arm (arm.o): Update.
* haifa-sched.c (update_insn_after_change): Update.
(rank_for_schedule): Use auto-prefetcher model, if requested.
(autopref_multipass_init): New static function.
(autopref_rank_for_schedule): New rank_for_schedule heuristic.
(autopref_multipass_dfa_lookahead_guard_started_dump_p): New static
variable for debug dumps.
(autopref_multipass_dfa_lookahead_guard_1): New static helper function.
(autopref_multipass_dfa_lookahead_guard): New global function that
implements TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD hook.
(init_h_i_d): Update.
* params.def (PARAM_SCHED_AUTOPREF_QUEUE_DEPTH): New tuning knob.
* sched-int.h (enum autopref_multipass_data_status): New const enum.
(autopref_multipass_data_): Structure for auto-prefetcher data.
(autopref_multipass_data_def, autopref_multipass_data_t): New typedefs.
(struct _haifa_insn_data:autopref_multipass_data): New field.
(INSN_AUTOPREF_MULTIPASS_DATA): New access macro.
(autopref_multipass_dfa_lookahead_guard): Declare.
2015-01-17 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
Backport from trunk r219787.
2015-01-17 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
* config/aarch64/aarch64.c
(aarch64_sched_first_cycle_multipass_dfa_lookahead): Implement hook.
(TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Define.
* config/arm/arm.c
(arm_first_cycle_multipass_dfa_lookahead): Implement hook.
(TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Define.
Backport from trunk r216624.
* rtlanal.c (get_base_term): Handle SCRATCH.
2014-10-24 Maxim Kuvyrkov <maxim.kuvyrkov@gmail.com>
Backport from trunk r216623.
* haifa-sched.c (sched_init): Disable max_issue when scheduling for
register pressure.
2014-10-24 Maxim Kuvyrkov <maxim.kuvyrkov@gmail.com>
Backport from trunk r216622.
* haifa-sched.c (cached_first_cycle_multipass_dfa_lookahead,)
(cached_issue_rate): Remove. Use dfa_lookahead and issue_rate instead.
(max_issue, choose_ready, sched_init): Update.
2014-10-24 Maxim Kuvyrkov <maxim.kuvyrkov@gmail.com>
Backport from trunk r216621.
* sched-int.h (struct _haifa_insn_data:last_rfs_win): New field.
* haifa-sched.c (INSN_LAST_RFS_WIN): New access macro.
(rfs_result): Set INSN_LAST_RFS_WIN. Update signature.
(rank_for_schedule): Update calls to rfs_result to pass new parameters.
(print_rank_for_schedule_stats): Print out elements of ready list that
ended up on their respective places due to each of the sorting
heuristics.
(ready_sort): Update.
(debug_ready_list_1): Improve printout for SCHED_PRESSURE_MODEL.
(schedule_block): Update.
2014-10-24 Maxim Kuvyrkov <maxim.kuvyrkov@gmail.com>
Backport from trunk r216620.
2014-10-24 Maxim Kuvyrkov <maxim.kuvyrkov@gmail.com>
* haifa-sched.c (sched_class_regs_num, call_used_regs_num): New static
arrays. Use sched_class_regs_num instead of ira_class_hard_regs_num.
(print_curr_reg_pressure, setup_insn_reg_pressure_info,)
(model_update_pressure, model_spill_cost): Use sched_class_regs_num.
(model_start_schedule): Update.
(sched_pressure_start_bb): New static function. Calculate
sched_class_regs_num.
(schedule_block): Use it.
(alloc_global_sched_pressure_data): Calculate call_used_regs_num.
Backport from trunk r213709.
* haifa-sched.c (SCHED_SORT): Delete. Macro used exactly once.
(enum rfs_decition:RFS_*): New constants wrapped in an enum.
(rfs_str): String corresponding to RFS_* constants.
(rank_for_schedule_stats_t): New typedef.
(rank_for_schedule_stats): New static variable.
(rfs_result): New static function.
(rank_for_schedule): Track statistics for deciding heuristics.
(rank_for_schedule_stats_diff, print_rank_for_schedule_stats): New
static functions.
(ready_sort): Use them for debug printouts.
(schedule_block): Init statistics state. Print statistics on
rank_for_schedule decisions.
2014-08-07 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
Backport from trunk r213708.
2014-08-07 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
* haifa-sched.c (rank_for_schedule): Fix INSN_TICK-based heuristics.
Backport from trunk r210845.
2014-05-23 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
Fix bootstrap error on ia64
* config/ia64/ia64.c (ia64_first_cycle_multipass_dfa_lookahead_guard):
Return default value.
Backport from trunk r210747.
Cleanup and improve multipass_dfa_lookahead_guard
* config/i386/i386.c (core2i7_first_cycle_multipass_filter_ready_try,)
(core2i7_first_cycle_multipass_begin,)
(core2i7_first_cycle_multipass_issue,)
(core2i7_first_cycle_multipass_backtrack): Update signature.
* config/ia64/ia64.c
(ia64_first_cycle_multipass_dfa_lookahead_guard_spec): Remove.
(ia64_first_cycle_multipass_dfa_lookahead_guard): Update signature.
(TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD_SPEC): Remove
hook definition.
(ia64_first_cycle_multipass_dfa_lookahead_guard): Merge logic from
ia64_first_cycle_multipass_dfa_lookahead_guard_spec. Update return
values.
* config/rs6000/rs6000.c (rs6000_use_sched_lookahead_guard): Update
return values.
* doc/tm.texi: Regenerate.
* doc/tm.texi.in
(TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD_SPEC): Remove.
* haifa-sched.c (ready_try): Make signed to allow negative values.
(rebug_ready_list_1): Update.
(choose_ready): Simplify.
(sched_extend_ready_list): Update.
2014-05-22 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
Backport from trunk r210746.
Remove IA64 speculation tweaking flags
* config/ia64/ia64.c (ia64_set_sched_flags): Delete handling of
speculation tuning flags.
(msched-prefer-non-data-spec-insns,)
(msched-prefer-non-control-spec-insns): Obsolete options.
* haifa-sched.c (choose_ready): Remove handling of
PREFER_NON_CONTROL_SPEC and PREFER_NON_DATA_SPEC.
* sched-int.h (enum SPEC_SCHED_FLAGS): Remove PREFER_NON_CONTROL_SPEC
and PREFER_NON_DATA_SPEC.
* sel-sched.c (process_spec_exprs): Remove handling of
PREFER_NON_CONTROL_SPEC and PREFER_NON_DATA_SPEC.
Backport from trunk r210744.
2014-05-22 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
Improve scheduling debug output
* haifa-sched.c (debug_ready_list): Remove unnecessary prototype.
(advance_one_cycle): Update.
(schedule_insn, queue_to_ready): Add debug printouts.
(debug_ready_list_1): New static function.
(debug_ready_list): Update.
(max_issue): Add debug printouts.
(dump_insn_stream): New static function.
(schedule_block): Use it. Also better indent printouts.
2014-05-22 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
Fix sched_insn debug counter
* haifa-sched.c (schedule_insn): Update.
(struct haifa_saved_data): Add nonscheduled_insns_begin.
(save_backtrack_point, restore_backtrack_point): Update.
(first_nonscheduled_insn): New static function.
(queue_to_ready, choose_ready): Use it.
(schedule_block): Init nonscheduled_insns_begin.
(sched_emit_insn): Update.
Backport from trunk r220808.
* gcc.dg/pr64935-1.c, gcc.dg/pr64935-2.c: New tests.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221634 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r218525.
2014-12-09 Andrew Pinski apinski@cavium.com
Kyrylo Tkachov kyrylo.tkachov@arm.com
* config/aarch64/aarch64.c (AARCH64_FUSE_CMP_BRANCH): New define.
(thunderx_tunings): Add AARCH64_FUSE_CMP_BRANCH to fuseable_ops.
(aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_CMP_BRANCH.
2015-03-18 Michael Collison <michael.collison@linaro.org>
Backport from trunk r218014.
2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (AARCH64_FUSE_ADRP_LDR): Define.
(cortexa53_tunings): Specify AARCH64_FUSE_ADRP_LDR in fuseable_ops.
(aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_ADRP_LDR.
2015-03-18 Michael Collison <michael.collison@linaro.org>
Backport from trunk r218013.
2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (AARCH64_FUSE_MOVK_MOVK): Define.
(cortexa53_tunings): Specify AARCH64_FUSE_MOVK_MOVK in fuseable_ops.
(cortexa57_tunings): Likewise.
(aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_MOVK_MOVK.
2015-03-18 Michael Collison <michael.collison@linaro.org>
Backport from trunk r218012.
2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* sched-deps.c (sched_macro_fuse_insns): Do not check modified_in_p
in the not conditional jump case.
* doc/tm.texi (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description.
* target.def (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description.
2015-03-18 Michael Collison <michael.collison@linaro.org>
Backport from trunk r218010.
2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c: Include tm-constrs.h
(AARCH64_FUSE_ADRP_ADD): Define.
(cortexa57_tunings): Add AARCH64_FUSE_ADRP_ADD to fuseable_ops.
(cortexa53_tunings): Likewise.
(aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_ADRP_ADD.
2015-03-18 Michael Collison <michael.collison@linaro.org>
Backport from trunk r218007.
2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-protos.h (struct tune_params): Add
fuseable_ops field.
* config/aarch64/aarch64.c (generic_tunings): Specify fuseable_ops.
(cortexa53_tunings): Likewise.
(cortexa57_tunings): Likewise.
(thunderx_tunings): Likewise.
(aarch64_macro_fusion_p): New function.
(aarch_macro_fusion_pair_p): Likewise.
(TARGET_SCHED_MACRO_FUSION_P): Define.
(TARGET_SCHED_MACRO_FUSION_PAIR_P): Likewise.
(AARCH64_FUSE_MOV_MOVK): Likewise.
(AARCH64_FUSE_NOTHING): Likewise.
2015-03-18 Michael Collison <michael.collison@linaro.org>
Backport from trunk r218012.
2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/aarch64/fuse_adrp_add_1.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221507 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221394 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221389 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221360 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r218503.
2014-12-08 Sandra Loosemore <sandra@codesourcery.com>
* simplify-rtx.c (simplify_relational_operation_1): Handle
simplification identities for BICS patterns.
2015-03-10 Michael Collison <michael.collison@linaro.org>
Backport from trunk r218503.
2014-12-08 Sandra Loosemore <sandra@codesourcery.com>
* gcc.target/aarch64/bics_4.c: New.
2015-03-10 Michael Collison <michael.collison@linaro.org>
Backport from trunk r218486.
2014-12-08 Alex Velenko <Alex.Velenko@arm.com>
* gcc.target/aarch64/bics_3.c : New testcase.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221344 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r220751.
2015-02-17 James Greenhalgh <james.greenhalgh@arm.com>
* haifa-sched.c (recompute_todo_spec): Treat SCHED_GROUP_P
as forcing a HARD_DEP between instructions, thereby
disallowing rewriting to break dependencies.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221343 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r217725.
2014-11-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/cortex-a15-neon.md (cortex_a15_vfp_to_from_gp):
Split into...
(cortex_a15_gp_to_vfp): ...This.
(cortex_a15_fp_to_gp): ...And this.
Define and comment bypass from vfp operations to fp->gp moves.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221339 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r217780.
2014-11-19 Wilco Dijkstra <wdijkstr@arm.com>
PR target/61915
* config/aarch64/aarch64.c (generic_regmove_cost): Increase FP move
cost.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221302 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r217938.
2014-11-21 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/iterators.md (VS): New mode iterator.
(vsi2qi): New mode attribute.
(VSI2QI): Likewise.
* config/aarch64/aarch64-simd-builtins.def: New entry for ctz.
* config/aarch64/aarch64-simd.md (ctz<mode>2): New pattern for ctz.
* config/aarch64/aarch64-builtins.c
(aarch64_builtin_vectorized_function): Support BUILT_IN_CTZ.
2015-03-10 Michael Collison <michael.collison@linaro.org>
Backport from trunk r217938.
2014-11-21 Jiong Wang <jiong.wang@arm.com>
* gcc.target/aarch64/vect_ctz_1.c: New testcase.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221301 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r217852.
2014-11-20 Tejas Belagod <tejas.belagod@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_classify_symbol):
Fixup prototype.
* config/aarch64/aarch64.c (aarch64_expand_mov_immediate,
aarch64_cannot_force_const_mem, aarch64_classify_address,
aarch64_classify_symbolic_expression): Fixup call to
aarch64_classify_symbol.
(aarch64_classify_symbol): Add range-checking for
symbol + offset addressing for tiny and small models.
2015-03-10 Michael Collison <michael.collison@linaro.org>
Backport from trunk r217852.
2014-11-20 Tejas Belagod <tejas.belagod@arm.com>
* gcc.target/aarch64/symbol-range.c: New.
* gcc.target/aarch64/symbol-range-tiny.c: New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221300 138bc75d-0d04-0410-961f-82ee72b054a4
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2015-03-06 Christophe Lyon <christophe.lyon@linaro.org>
Backport from trunk r218463, r219764, r219765, r219767, r219914,
r219917, r219918, r219919, r219920, r219921, r219922, r219930,
r219931, r219932, r219934, r219937, r219938, r219939, r219940,
r219941, r219942, r219943, r219944, r219945, r219946, r219947,
r219948, r219949, r219950, r220117, r220118, r220119, r220121,
r220122, r220123, r220124, r220126, r220353.
2015-02-02 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
(_ARM_FPSRC): Add DN and AHP fields.
(clean_results): Force DN=1 on AArch64.
* gcc.target/aarch64/advsimd-intrinsics/binary_op_no64.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vhadd.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vhsub.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmax.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmin.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vrhadd.c: New file.
2015-01-26 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vpaddl.c: New file.
2015-01-26 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vpadal.c: New file.
2015-01-26 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmvn.c: New file.
2015-01-26 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmovl.c: New file.
2015-01-26 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vpXXX.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vpadd.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vpmax.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vpmin.c: New file.
2015-01-26 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmlX_n.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmla_n.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmls_n.c: New file.
2015-01-26 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vXXXhn.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vraddhn.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vrsubhn.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vsubhn.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vaddhn.c: Use code from
vXXXhn.inc.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vqdmull_n.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vqdmull_lane.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vqdmull.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vqdmulh_n.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vqdmulh_lane.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vqdmulh.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmull_n.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmull_lane.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmull.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmul_n.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmul_lane.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmovn.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vXXXw.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vsubw.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vaddw.c: Use code from
vXXXw.inc.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vXXXl.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vsubl.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vaddl.c: Use code from
vXXXl.inc.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vsXi_n.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vsli_n.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vsri_n.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vqdmlXl_n.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vqdmlal_n.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vqdmlsl_n.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vqdmlXl_lane.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vqdmlal_lane.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vqdmlsl_lane.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vqdmlXl.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vqdmlal.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vqdmlsl.c: New file.
2015-01-20 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmlXl_n.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmlal_n.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmlsl_n.c: New file.
2015-01-20 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmlXl_lane.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmlal_lane.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmlsl_lane.c: New file.
2015-01-20 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmlXl.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmlal.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmlsl.c: New file.
2015-01-20 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vtrn.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vuzp.c: Use code from
vshuffle.inc.
* gcc.target/aarch64/advsimd-intrinsics/vzip.c: Use code from
vshuffle.inc.
2015-01-20 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmlX_lane.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmla_lane.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmls_lane.c: New file.
2015-01-20 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmlX.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmla.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmls.c: New file.
2015-01-20 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c: New file.
2015-01-16 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vld1_lane.c: New file.
2015-01-16 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (CHECK):
Add trace.
(CHECK_FP): Likewise.
(CHECK_CUMULATIVE_SAT): Likewise.
2015-01-16 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
(Set_Neon_Cumulative_Sat): Add parameter.
(__set_neon_cumulative_sat): Support new parameter.
* gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc
(TEST_BINARY_SAT_OP1): Call Set_Neon_Cumulative_Sat with new
argument.
* gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc
(TEST_UNARY_SAT_OP1): Call Set_Neon_Cumulative_Sat with new
argument.
2014-12-07 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vaddhn.c: Actually execute
the test.
* gcc.target/aarch64/advsimd-intrinsics/vaddl.c: Actually execute
the test. Fix expected output.
* gcc.target/aarch64/advsimd-intrinsics/vaddw.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221242 138bc75d-0d04-0410-961f-82ee72b054a4
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2015-03-06 Christophe Lyon <christophe.lyon@linaro.org>
Backport from trunk r217707.
2014-11-18 Christophe Lyon <christophe.lyon@linaro.org>
* config/arm/neon-testgen.ml (emit_prologue): Handle new
compile_test_optim argument.
(emit_automatics): Rename to emit_variables. Support variable
indentation of its output.
(compile_test_optim): New function.
(test_intrinsic): Call compile_test_optim.
* config/arm/neon.ml (features): Add Compiler_optim.
(ops): Add Compiler_optim feature to Vbic and Vorn.
(type_in_crypto_only): Replace 'or' by '||'.
(reinterp): Likewise.
(reinterpq): Likewise.
gcc/testsuite/
2015-03-06 Christophe Lyon <christophe.lyon@linaro.org>
Backport from trunk r217707.
2014-11-18 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/arm/neon/vbicQs16.c: Regenerate.
* gcc.target/arm/neon/vbicQs32.c: Likewise.
* gcc.target/arm/neon/vbicQs64.c: Likewise.
* gcc.target/arm/neon/vbicQs8.c: Likewise.
* gcc.target/arm/neon/vbicQu16.c: Likewise.
* gcc.target/arm/neon/vbicQu32.c: Likewise.
* gcc.target/arm/neon/vbicQu64.c: Likewise.
* gcc.target/arm/neon/vbicQu8.c: Likewise.
* gcc.target/arm/neon/vbics16.c: Likewise.
* gcc.target/arm/neon/vbics32.c: Likewise.
* gcc.target/arm/neon/vbics64.c: Likewise.
* gcc.target/arm/neon/vbics8.c: Likewise.
* gcc.target/arm/neon/vbicu16.c: Likewise.
* gcc.target/arm/neon/vbicu32.c: Likewise.
* gcc.target/arm/neon/vbicu64.c: Likewise.
* gcc.target/arm/neon/vbicu8.c: Likewise.
* gcc.target/arm/neon/vornQs16.c: Likewise.
* gcc.target/arm/neon/vornQs32.c: Likewise.
* gcc.target/arm/neon/vornQs64.c: Likewise.
* gcc.target/arm/neon/vornQs8.c: Likewise.
* gcc.target/arm/neon/vornQu16.c: Likewise.
* gcc.target/arm/neon/vornQu32.c: Likewise.
* gcc.target/arm/neon/vornQu64.c: Likewise.
* gcc.target/arm/neon/vornQu8.c: Likewise.
* gcc.target/arm/neon/vorns16.c: Likewise.
* gcc.target/arm/neon/vorns32.c: Likewise.
* gcc.target/arm/neon/vorns64.c: Likewise.
* gcc.target/arm/neon/vorns8.c: Likewise.
* gcc.target/arm/neon/vornu16.c: Likewise.
* gcc.target/arm/neon/vornu32.c: Likewise.
* gcc.target/arm/neon/vornu64.c: Likewise.
* gcc.target/arm/neon/vornu8.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221241 138bc75d-0d04-0410-961f-82ee72b054a4
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Backport from trunk r217706.
2014-11-18 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vcls.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vcnt.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vcombine.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vcreate.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vcvt.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vext.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vget_high.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vget_low.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221240 138bc75d-0d04-0410-961f-82ee72b054a4
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2015-03-06 Christophe Lyon <christophe.lyon@linaro.org>
Backport from trunk r216663.
2014-10-24 Jiong Wang <jiong.wang@arm.com>
* lib/target-supports.exp
(check_effective_target_arm_crypto_ok_nocache): Remove declaration for
vaeseq_u8.
(check_effective_target_arm_neon_fp16_ok_nocache): Remove declaration
for vcvt_f16_f32.
(check_effective_target_arm_neonv2_ok_nocache): Remove declaration for
vfma_f32.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221239 138bc75d-0d04-0410-961f-82ee72b054a4
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2015-03-05 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r212011, r214942, r214957, r215012, r215016, r218115,
r218733, r218746, r220491.
2015-02-06 Sebastian Pop <s.pop@samsung.com>
Brian Rzycki <b.rzycki@samsung.com>
PR tree-optimization/64878
* tree-ssa-threadedge.c: Include tree-ssa-loop.h.
(fsm_find_control_statement_thread_paths): Add parameter seen_loop_phi.
Stop recursion at loop phi nodes after having visited a loop phi node.
2014-12-15 Richard Biener <rguenther@suse.de>
PR middle-end/64246
* cfgloop.c (mark_loop_for_removal): Make safe against multiple
invocations on the same loop.
2014-12-15 Richard Biener <rguenther@suse.de>
PR tree-optimization/64284
* tree-ssa-threadupdate.c (duplicate_seme_region): Mark
the loop for removal if we copied the loop header.
2014-11-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/64083
* tree-ssa-threadupdate.c (thread_through_all_blocks): Do not
forcibly mark loop for removal the wrong way.
2014-09-08 Richard Biener <rguenther@suse.de>
PR ipa/63196
* tree-inline.c (copy_loops): The source loop header should
always be non-NULL.
(tree_function_versioning): If loops need fixup after removing
unreachable blocks fix them.
* omp-low.c (simd_clone_adjust): Do not add incr block to
loop under construction.
2014-09-08 Richard Biener <rguenther@suse.de>
PR bootstrap/63204
* cfgloop.c (mark_loop_for_removal): Track former header
unconditionally.
* cfgloop.h (struct loop): Add former_header member unconditionally.
* loop-init.c (fix_loop_structure): Enable bogus loop removal
diagnostic unconditionally.
2014-09-05 Richard Biener <rguenther@suse.de>
* cfgloop.c (mark_loop_for_removal): Record former header
when ENABLE_CHECKING.
* cfgloop.h (strut loop): Add former_header member when
ENABLE_CHECKING.
* loop-init.c (fix_loop_structure): Sanity check loops
marked for removal if they re-appeared.
2014-09-05 Richard Biener <rguenther@suse.de>
* cfgloop.c (mark_loop_for_removal): New function.
* cfgloop.h (mark_loop_for_removal): Declare.
* cfghooks.c (delete_basic_block): Use mark_loop_for_removal.
(merge_blocks): Likewise.
(duplicate_block): Likewise.
* except.c (sjlj_emit_dispatch_table): Likewise.
* tree-eh.c (cleanup_empty_eh_merge_phis): Likewise.
* tree-ssa-threadupdate.c (ssa_redirect_edges): Likewise.
(thread_through_loop_header): Likewise.
2014-06-26 Richard Biener <rguenther@suse.de>
PR tree-optimization/61607
* tree-ssa-threadupdate.c (ssa_redirect_edges): Cancel the
loop if we redirected its latch edge.
(thread_block_1): Do not cancel loops prematurely.
gcc/testsuite/
2015-03-05 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r218115, r218733, r218746, r220491.
2015-02-06 Sebastian Pop <s.pop@samsung.com>
Brian Rzycki <b.rzycki@samsung.com>
PR tree-optimization/64878
* testsuite/gcc.dg/tree-ssa/ssa-dom-thread-8.c: New.
2014-12-15 Richard Biener <rguenther@suse.de>
PR middle-end/64246
* gnat.dg/opt46.adb: New testcase.
* gnat.dg/opt46.ads: Likewise.
* gnat.dg/opt46_pkg.adb: Likewise.
* gnat.dg/opt46_pkg.ads: Likewise.
2014-12-15 Richard Biener <rguenther@suse.de>
PR tree-optimization/64284
* gcc.dg/torture/pr64284.c: New testcase.
2014-11-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/64083
* gcc.dg/torture/pr64083.c: New testcase.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221216 138bc75d-0d04-0410-961f-82ee72b054a4
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2015-03-05 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r220860.
2015-02-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.md (*aarch64_lshr_sisd_or_int_<mode>3):
Mark operand 0 as earlyclobber in 2nd alternative.
(1st define_split below *aarch64_lshr_sisd_or_int_<mode>3):
Write negated shift amount into QI lowpart operand 0 and use it
in the shift step.
(2nd define_split below *aarch64_lshr_sisd_or_int_<mode>3): Likewise.
gcc/testsuite/
2015-03-05 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r220860.
2015-02-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/aarch64/sisd-shft-neg_1.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221215 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221196 138bc75d-0d04-0410-961f-82ee72b054a4
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