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2020-03-06Improve diff-ability of scheduler logslinaro-local/pr91598Maxim Kuvyrkov
* haifa-sched.c (advance_one_cycle): Output more context-synchronization lines for diff. Change-Id: I7de4ca32a2063ed6c063eb2e5171d81a6362db61
2020-03-06Add missing entry for rank_for_schedule stats.Maxim Kuvyrkov
* haifa-sched.c (enum rfs_decision, rfs_str): Add RFS_AUTOPREF. (rank_for_schedule): Use it. Change-Id: I376841101c2528814adc37c76ea94cdf12095d72
2020-03-06Improve autoprefetcher heuristic (partly fix regression in PR91598)Maxim Kuvyrkov
PR rtl-optimization/91598 * haifa-sched.c (autopref_rank_for_schedule): Prioritize "irrelevant" insns after memory reads and before memory writes. Change-Id: Ie9dd3664c652760ca605fcb3fe53190429870ded
2020-03-06Avoid putting a REG_NOTE on anything other than an INSN in haifa-sched.cAndrew Pinski
PR rtl-optimization/93996 * haifa-sched.c (remove_notes): Be more careful when adding REG_SAVE_NOTE.
2020-03-06arc: Update tumaddsidi4 test.Claudiu Zissulescu
The test is using -O1 and, the macu instruction is generated by the combiner and not in the expand step. My previous "arc: Improve code gen for 64bit add/sub operations." is actually splitting the 64-bit add in the expand, leading to the impossibility to match the multiply and accumulate on 64 bit datum by the combiner, hence, the error. This patch is stepping up the optimization level which will generate the macu instruction at the expand time. xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * gcc.target/arc/tumaddsidi4.c: Step-up optimization level. Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
2020-03-06libstdc++: Add missing friend declaration to join_view::_SentinelPatrick Palka
The converting constructor of join_view::_Sentinel<true> needs to be able to access the private members of join_view::_Sentinel<false>. libstdc++-v3/ChangeLog: * include/std/ranges (join_view::_Sentinel<_Const>): Befriend join_view::_Sentinel<!_Const>. * testsuite/std/ranges/adaptors/join.cc: Augment test.
2020-03-06libstdc++: Give ranges::empty() a concrete return type (PR 93978)Patrick Palka
This works around PR 93978 by avoiding having to instantiate the body of ranges::empty() when checking the constraints of view_interface::operator bool(). When ranges::empty() has an auto return type, then we must instantiate its body in order to determine whether the requires expression { ranges::empty(_M_derived()); } is well-formed. But this means instantiating view_interface::empty() and hence view_interface::_M_derived(), all before we've yet deduced the return type of join_view::end(). (The reason view_interface::operator bool() is needed in join_view::end() in the first place is because in this function we perform direct initialization of join_view::_Sentinel from a join_view, and so we try to find a conversion sequence from the latter to the former that goes through this conversion operator.) Giving ranges::empty() a concrete return type of bool should be safe according to [range.prim.empty]/4 which says "whenever ranges::empty(E) is a valid expression, it has type bool." This fixes the test case in PR 93978 when compiling without -Wall, but with -Wall the test case still fails due to the issue described in PR c++/94038, I think. I still don't quite understand why the test case doesn't fail without -O. libstdc++-v3/ChangeLog: PR libstdc++/93978 * include/bits/range_access.h (__cust_access::_Empty::operator()): Declare return type to be bool instead of auto. * testsuite/std/ranges/adaptors/93978.cc: New test.
2020-03-06libstdc++: Fix PR number in ChangeLog (PR 94069)Jonathan Wakely
2020-03-06libstdc++: Fix call to __glibcxx_rwlock_init (PR 93244)Jonathan Wakely
When the target doesn't define PTHREAD_RWLOCK_INITIALIZER we use a wrapper around pthread_wrlock_init, but the wrapper only takes one argument and we try to call it with two. This went unnnoticed on most targets because they do define the PTHREAD_RWLOCK_INITIALIZER macro, but it causes a bootstrap failure on darwin8. PR libstdc++/93244 * include/std/shared_mutex [!PTHREAD_RWLOCK_INITIALIZER] (__shared_mutex_pthread::__shared_mutex_pthread()): Remove incorrect second argument to __glibcxx_rwlock_init. * testsuite/30_threads/shared_timed_mutex/94069.cc: New test.
2020-03-06Add missing ChangeLog entriesAndreas Krebbel
2020-03-06libstdc++: Fix failing filesystem::path tests (PR 93244)Jonathan Wakely
The checks for PR 93244 don't actually pass on Windows (which is the target where the bug is present) because of a different bug, PR 94063. This adjusts the tests to not be affected by 94063 so that they verify that 93244 was fixed. PR libstdc++/93244 * testsuite/27_io/filesystem/path/generic/generic_string.cc: Adjust test to not fail due to PR 94063. * testsuite/27_io/filesystem/path/generic/utf.cc: Likewise. * testsuite/27_io/filesystem/path/generic/wchar_t.cc: Likewise.
2020-03-06libstdc++: Deal with ENOSYS == ENOTSUPAndreas Krebbel
zTPF uses the same numeric value for ENOSYS and ENOTSUP. libstdc++-v3/ChangeLog: 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com> * src/c++11/system_error.cc: Omit the ENOTSUP case statement if it would match ENOSYS.
2020-03-06ACLE intrinsics: BFloat16 load intrinsics for AArch32Delia Burduv
2020-03-06 Delia Burduv <delia.burduv@arm.com> * config/arm/arm_neon.h (vld2_bf16): New. (vld2q_bf16): New. (vld3_bf16): New. (vld3q_bf16): New. (vld4_bf16): New. (vld4q_bf16): New. (vld2_dup_bf16): New. (vld2q_dup_bf16): New. (vld3_dup_bf16): New. (vld3q_dup_bf16): New. (vld4_dup_bf16): New. (vld4q_dup_bf16): New. * config/arm/arm_neon_builtins.def (vld2): Changed to VAR13 and added v4bf, v8bf (vld2_dup): Changed to VAR8 and added v4bf, v8bf (vld3): Changed to VAR13 and added v4bf, v8bf (vld3_dup): Changed to VAR8 and added v4bf, v8bf (vld4): Changed to VAR13 and added v4bf, v8bf (vld4_dup): Changed to VAR8 and added v4bf, v8bf * config/arm/iterators.md (VDXBF2): New iterator. *config/arm/neon.md (neon_vld2): Use new iterators. (neon_vld2_dup<mode): Use new iterators. (neon_vld3<mode>): Likewise. (neon_vld3qa<mode>): Likewise. (neon_vld3qb<mode>): Likewise. (neon_vld3_dup<mode>): Likewise. (neon_vld4<mode>): Likewise. (neon_vld4qa<mode>): Likewise. (neon_vld4qb<mode>): Likewise. (neon_vld4_dup<mode>): Likewise. (neon_vld2_dupv8bf): New. (neon_vld3_dupv8bf): Likewise. (neon_vld4_dupv8bf): Likewise. * gcc.target/arm/simd/bf16_vldn_1.c: New test.
2020-03-06ACLE intrinsics: BFloat16 store (vst<n>{q}_bf16) intrinsics for AArch32Delia Burduv
2020-03-06 Delia Burduv <delia.burduv@arm.com> * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef. (bfloat16x8x2_t): New typedef. (bfloat16x4x3_t): New typedef. (bfloat16x8x3_t): New typedef. (bfloat16x4x4_t): New typedef. (bfloat16x8x4_t): New typedef. (vst2_bf16): New. (vst2q_bf16): New. (vst3_bf16): New. (vst3q_bf16): New. (vst4_bf16): New. (vst4q_bf16): New. * config/arm/arm-builtins.c (v2bf_UP): Define. (VAR13): New. (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype. * config/arm/arm-modes.def (V2BF): New mode. * config/arm/arm-simd-builtin-types.def (Bfloat16x2_t): New entry. * config/arm/arm_neon_builtins.def (vst2): Changed to VAR13 and added v4bf, v8bf (vst3): Changed to VAR13 and added v4bf, v8bf (vst4): Changed to VAR13 and added v4bf, v8bf * config/arm/iterators.md (VDXBF): New iterator. (VQ2BF): New iterator. *config/arm/neon.md (neon_vst2<mode>): Used new iterators. (neon_vst2<mode>): Used new iterators. (neon_vst3<mode>): Used new iterators. (neon_vst3<mode>): Used new iterators. (neon_vst3qa<mode>): Used new iterators. (neon_vst3qb<mode>): Used new iterators. (neon_vst4<mode>): Used new iterators. (neon_vst4<mode>): Used new iterators. (neon_vst4qa<mode>): Used new iterators. (neon_vst4qb<mode>): Used new iterators. * gcc.target/arm/simd/bf16_vstn_1.c: New test.
2020-03-06RISC-V: Fix testsuite regression due to recent IRA changes.Kito Cheng
2020-03-06aarch64: ACLE intrinsics for BFCVTN, BFCVTN2 and BFCVTDelia Burduv
This patch adds the Armv8.6-a ACLE intrinsics for bfcvtn, bfcvtn2 and bfcvt as part of the BFloat16 extension. (https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics) The intrinsics are declared in arm_bf16.h and arm_neon.h and the RTL patterns are defined in aarch64-simd.md. 2020-03-06 Delia Burduv <delia.burduv@arm.com> gcc/ * config/aarch64/aarch64-simd-builtins.def (bfcvtn): New built-in function. (bfcvtn_q): New built-in function. (bfcvtn2): New built-in function. (bfcvt): New built-in function. * config/aarch64/aarch64-simd.md (aarch64_bfcvtn<q><mode>): New pattern. (aarch64_bfcvtn2v8bf): New pattern. (aarch64_bfcvtbf): New pattern. * config/aarch64/arm_bf16.h (float32_t): New typedef. (vcvth_bf16_f32): New intrinsic. * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic. (vcvtq_low_bf16_f32): New intrinsic. (vcvtq_high_bf16_f32): New intrinsic. * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator. (UNSPEC_BFCVTN): New UNSPEC. (UNSPEC_BFCVTN2): New UNSPEC. (UNSPEC_BFCVT): New UNSPEC. * config/arm/types.md (bf_cvt): New type. gcc/testsuite/ * gcc.target/aarch64/advsimd-intrinsics/bfcvt-compile.c: New test. * gcc.target/aarch64/advsimd-intrinsics/bfcvt-nobf16.c: New test. * gcc.target/aarch64/advsimd-intrinsics/bfcvt-nosimd.c: New test. * gcc.target/aarch64/advsimd-intrinsics/bfcvtnq2-untied.c: New test.
2020-03-06Fix error format string.Andreas Krebbel
gcc/ChangeLog: 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com> * config/s390/s390.md ("tabort"): Get rid of two consecutive blanks in format string.
2020-03-06re PR tree-optimization/90883 (Generated code is worse if returned struct is ↵Kito Cheng
unnamed) After add --param max-inline-insns-size=1 all target will remove the redundant store at dse1, except some targets like AArch64 and MIPS will expand the struct initialization into loop due to CLEAR_RATIO. Tested on cross compiler of riscv32, riscv64, x86, x86_64, mips, mips64, aarch64, nds32 and arm. gcc/testsuite/ChangeLog PR tree-optimization/90883 * g++.dg/tree-ssa/pr90883.c: Add --param max-inline-insns-size=1. Add aarch64-*-* mips*-*-* to XFAIL.
2020-03-05i386: Properly encode vector registers in vector moveH.J. Lu
On x86, when AVX and AVX512 are enabled, vector move instructions can be encoded with either 2-byte/3-byte VEX (AVX) or 4-byte EVEX (AVX512): 0: c5 f9 6f d1 vmovdqa %xmm1,%xmm2 4: 62 f1 fd 08 6f d1 vmovdqa64 %xmm1,%xmm2 We prefer VEX encoding over EVEX since VEX is shorter. Also AVX512F only supports 512-bit vector moves. AVX512F + AVX512VL supports 128-bit and 256-bit vector moves. xmm16-xmm31 and ymm16-ymm31 are disallowed in 128-bit and 256-bit modes when AVX512VL is disabled. Mode attributes on x86 vector move patterns indicate target preferences of vector move encoding. For scalar register to register move, we can use 512-bit vector move instructions to move 32-bit/64-bit scalar if AVX512VL isn't available. With AVX512F and AVX512VL, we should use VEX encoding for 128-bit/256-bit vector moves if upper 16 vector registers aren't used. This patch adds a function, ix86_output_ssemov, to generate vector moves: 1. If zmm registers are used, use EVEX encoding. 2. If xmm16-xmm31/ymm16-ymm31 registers aren't used, SSE or VEX encoding will be generated. 3. If xmm16-xmm31/ymm16-ymm31 registers are used: a. With AVX512VL, AVX512VL vector moves will be generated. b. Without AVX512VL, xmm16-xmm31/ymm16-ymm31 register to register move will be done with zmm register move. There is no need to set mode attribute to XImode explicitly since ix86_output_ssemov can properly encode xmm16-xmm31/ymm16-ymm31 registers with and without AVX512VL. Tested on AVX2 and AVX512 with and without --with-arch=native. gcc/ PR target/89229 PR target/89346 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype. * config/i386/i386.c (ix86_get_ssemov): New function. (ix86_output_ssemov): Likewise. * config/i386/sse.md (VMOVE:mov<mode>_internal): Call ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL check. (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV. (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL check. (*movti_internal): Likewise. (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV. gcc/testsuite/ PR target/89229 PR target/89346 * gcc.target/i386/avx512vl-vmovdqa64-1.c: Updated. * gcc.target/i386/pr89229-2a.c: New test. * gcc.target/i386/pr89229-2b.c: Likewise. * gcc.target/i386/pr89229-2c.c: Likewise. * gcc.target/i386/pr89229-3a.c: Likewise. * gcc.target/i386/pr89229-3b.c: Likewise. * gcc.target/i386/pr89229-3c.c: Likewise. * gcc.target/i386/pr89346.c: Likewise.
2020-03-06Daily bump.GCC Administrator
2020-03-05[PATCH][testuite] Fix pr80481.C after epilogue vectorizationAndre Vieira
* g++.dg/pr80481.C: Disable epilogue vectorization.
2020-03-05c: ignore initializers for elements of variable-size types [PR93577]Joseph Myers
Bug 93577, apparently a regression (although it isn't very clear to me exactly when it was introduced; tests I made with various past compilers produced inconclusive results, including e.g. ICEs appearing with 64-bit-host compilers for some versions but not 32-bit-host compilers for the same versions) is an C front-end tree-checking ICE processing initializers for structs using the VLA-in-struct extension. There is an error for such initializers, but other processing that still takes place for them results in the ICE. This patch ensures that processing of initializers for variable-size types stops earlier to avoid the code that results in the ICE (and ensures it stops earlier for error_mark_node to avoid ICEs in the check for variable-size types), adjusts the conditions for the "empty scalar initializer" diagnostic to avoid consequent excess errors in the case of a bad type name, and adds tests for a few variations on what such initializers might look like, as well as tests for cases identified from ICEs seen with an earlier version of this patch. Bootstrapped with no regressions for x86_64-pc-linux-gnu. PR c/93577 gcc/c: * c-typeck.c (pop_init_level): Do not diagnose initializers as empty when initialized type is error_mark_node. (set_designator, process_init_element): Ignore initializers for elements of a variable-size type or of error_mark_node. gcc/testsuite: * gcc.dg/pr93577-1.c, gcc.dg/pr93577-2.c, gcc.dg/pr93577-3.c, gcc.dg/pr93577-4.c, gcc.dg/pr93577-5.c, gcc.dg/pr93577-6.c: New tests. * gcc.dg/vla-init-1.c: Expect fewer errors about VLA initializer.
2020-03-05Commit correct version of gimple.c fileJeff Law
2020-03-05Fix location maybe_diag_overlap passes to diagnostics so that diagnostic ↵Jeff Law
pragmas work better. PR tree-optimization/91890 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument. Use gimple_or_expr_nonartificial_location. (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds. Use gimple_or_expr_nonartificial_location. * gimple.c (gimple_or_expr_nonartificial_location): New function. * gimple.h (gimple_or_expr_nonartificial_location): Declare it. * tree-ssa-strlen.c (maybe_warn_overflow): Use gimple_or_expr_nonartificial_location. (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise. (maybe_warn_pointless_strcmp): Likewise. * gcc.dg/pragma-diag-8.c: New test.
2020-03-05i386: Fix some -O0 avx2intrin.h and xopintrin.h intrinsic macros [PR94046]Jakub Jelinek
As the testcases show, the macros we have for -O0 for intrinsics that require constant argument(s) should first cast the argument to the type the -O1+ inline uses and afterwards to whatever type e.g. a builtin needs. The PR reported one which violated this, and I've grepped for all double-casts and grepped out from that meaningful casts where the __m{128,256,512}{,d,i} first cast is cast to same sized __v* type and has the same kind of element type (float, double, integral). These 7 macros were using different casts, and I've double checked them against the inline function types. 2020-03-05 Jakub Jelinek <jakub@redhat.com> PR target/94046 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of SRC and MASK arguments to __m128 from __m128d. (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256 from __m256d. (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128 from __m128d. * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C argument to __m128i from __m128d. (_mm256_permute2_pd): Fix first cast of C argument to __m256i from __m256d. (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128. (_mm256_permute2_ps): Fix first cast of C argument to __m256i from __m256. * g++.target/i386/pr94046-1.C: New test. * g++.target/i386/pr94046-2.C: New test.
2020-03-05[AArch32] ACLE intrinsics bfloat16 vmmla and vfma<b/t> for AArch32 AdvSIMDKyrylo Tkachov
Commit rest of the 43031fbdda7d4edbd607365a4f3bbec069fe3983 content. I screwed up on the "git add" commands there.
2020-03-05libstdc++: Fix some warnings in filesystem testsJonathan Wakely
There's a -Wunused-but-set-variable warning in operations/all.cc which can be fixed with [[maybe_unused]]. The statements in operations/copy.cc give -Wunused-value warnings. I think I meant to use |= rather than !=. And operations/file_size.cc gets -Wsign-compare warnings. * testsuite/27_io/filesystem/operations/all.cc: Mark unused variable. * testsuite/27_io/filesystem/operations/copy.cc: Fix typo. * testsuite/experimental/filesystem/operations/copy.cc: Likewise. * testsuite/27_io/filesystem/operations/file_size.cc: Use correct type for return value, and in comparison. * testsuite/experimental/filesystem/operations/file_size.cc: Likewise.
2020-03-05testsuite: Compile asan_test.C with -Wno-alloc-size-larger-thanUros Bizjak
asan_test.cc tries to allocate 0xf0000000 bytes for 32bit targets in a disabled DISABLED_DemoOOM test. Since the testcase is compiled with -Werror, the compilation fails with: error: argument 1 value '4026531840' exceeds maximum object size 2147483647 Compile with -Wno-alloc-size-larger-than to avoid compilation failure. * g++.dg/asan/asan_test.C (dg-options): Add -Wno-alloc-size-larger-than.
2020-03-05libstdc++: allow string_view insertion to work with <iosfwd> (PR 94051)Jonathan Wakely
I don't think this is actually required to compile, because using operator<< without a definition of the ostream doesn't seem valid to me. But it's easy to make it work. PR libstdc++/94051 * include/std/string_view: Include <bits/ostream_insert.h>. * testsuite/21_strings/basic_string_view/inserters/94051.cc: New test.
2020-03-05testsuite: Add testcase for already fixed PR [PR90311]Jakub Jelinek
2020-03-05 Jakub Jelinek <jakub@redhat.com> PR target/90311 * gcc.c-torture/execute/pr90311.c: New test.
2020-03-05Future proofing this test.Jeff Law
* gcc.target/arm/fuse-caller-save.c: Generalize expected output.
2020-03-05c++: Add test for PR91607.Jason Merrill
PR c++/91607 * g++.dg/cpp0x/constexpr-const3.C: New.
2020-03-05Fortran: ICE in gfc_code2string PR93792Steven G. Kargl
A BOZ constant can not appear as a component inialiser for a derived type. gcc/fortran/ChangeLog: PR93792 * decl.c (variable_decl): If param and initializer check for BOZ, if found, output an error, set m to MATCH_ERROR and goto cleanup. gcc/testsuite/ChangeLog: PR93792 * gfortran.dg/pr93792.f90: New test.
2020-03-05[AArch32] ACLE intrinsics bfloat16 vmmla and vfma<b/t> for AArch32 AdvSIMDDelia Burduv
This patch adds the ARMv8.6 ACLE intrinsics for vmmla, vfmab and vfmat as part of the BFloat16 extension. (https://developer.arm.com/docs/101028/latest.) The intrinsics are declared in arm_neon.h and the RTL patterns are defined in neon.md. Two new tests are added to check assembler output and lane indices. 2020-03-05 Delia Burduv <delia.burduv@arm.com> * config/arm/arm_neon.h (vbfmmlaq_f32): New. (vbfmlalbq_f32): New. (vbfmlaltq_f32): New. (vbfmlalbq_lane_f32): New. (vbfmlaltq_lane_f32): New. (vbfmlalbq_laneq_f32): New. (vbfmlaltq_laneq_f32): New. * config/arm/arm_neon_builtins.def (vmmla): New. (vfmab): New. (vfmat): New. (vfmab_lane): New. (vfmat_lane): New. (vfmab_laneq): New. (vfmat_laneq): New. * config/arm/iterators.md (BF_MA): New int iterator. (bt): New int attribute. (VQXBF): Copy of VQX with V8BF. * config/arm/neon.md (neon_vmmlav8bf): New insn. (neon_vfma<bt>v8bf): New insn. (neon_vfma<bt>_lanev8bf): New insn. (neon_vfma<bt>_laneqv8bf): New expand. (neon_vget_high<mode>): Changed iterator to VQXBF. * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC. (UNSPEC_BFMAB): New UNSPEC. (UNSPEC_BFMAT): New UNSPEC. 2020-03-05 Delia Burduv <delia.burduv@arm.com> * gcc.target/arm/simd/bf16_ma_1.c: New test. * gcc.target/arm/simd/bf16_ma_2.c: New test. * gcc.target/arm/simd/bf16_mmla_1.c: New test.
2020-03-05[PATCH][GCC]: Add myself to MAINTAINERSSrinath Parvathaneni
2020-03-05print-rtl: Fix printing of CONST_STRING in DEBUG_INSNs [PR93399]Jakub Jelinek
The following testcase fails to assemble, as CONST_STRING in the DEBUG_INSNs is printed as is, so if it contains \n and/or \r, we are in trouble: .loc 1 14 3 # DEBUG haystack => [si] # DEBUG needle => " " In the gimple dumps we print those (STRING_CSTs) as # DEBUG haystack => D#1 # DEBUG needle => "\n" so this patch uses what we use in tree printing for the CONST_STRINGs too. 2020-03-05 Jakub Jelinek <jakub@redhat.com> PR middle-end/93399 * tree-pretty-print.h (pretty_print_string): Declare. * tree-pretty-print.c (pretty_print_string): Remove forward declaration, no longer static. Change nbytes parameter type from unsigned to size_t. * print-rtl.c (print_value) <case CONST_STRING>: Use pretty_print_string and for shrink way too long strings. * gcc.dg/pr93399.c: New test.
2020-03-05Keep .GCC.command.line sections of LTO objetcsRichard Biener
This patch is for .GCC.command.line sections in LTO objects to be copied into the final objects as in the following example: [egeyar@localhost lto]$ gcc -flto -O3 demo.c -c -g --record-gcc-command-line [egeyar@localhost lto]$ gcc -flto -O2 demo2.c -c -g --record-gcc-command-line -DFORTIFY=2 [egeyar@localhost lto]$ gcc demo.o demo2.o -o a.out [egeyar@localhost lto]$ readelf -p .GCC.command.line a.out String dump of section '.GCC.command.line': [ 0] 10.0.1 20200227 (experimental) : gcc -flto -O3 demo.c -c -g --record-gcc-command-line [ 56] 10.0.1 20200227 (experimental) : gcc -flto -O2 demo2.c -c -g --record-gcc-command-line -DFORTIFY=2 2020-03-05 Egeyar Bagcioglu <egeyar.bagcioglu@oracle.com> * simple-object.c (handle_lto_debug_sections): Name ".GCC.command.line" among debug sections to be copied over from lto objects.
2020-03-05sccvn: Fix handling of POINTER_PLUS_EXPR in memset offset [PR93582]Jakub Jelinek
> > where POINTER_PLUS_EXPR last operand has sizetype type, thus unsigned, > > and in the testcase gimple_assign_rhs2 (def) is thus 0xf000000000000001ULL > > which multiplied by 8 doesn't fit into signed HWI. If it would be treated > > as signed offset instead, it would fit (-0xfffffffffffffffLL, multiplied > > by 8 is -0x7ffffffffffffff8LL). Unfortunately with the poly_int obfuscation > > I'm not sure how to convert it from unsigned to signed poly_int. > > mem_ref_offset provides a boiler-plate for this: > > poly_offset_int::from (wi::to_poly_wide (TREE_OPERAND (t, 1)), SIGNED); Thanks, that seems to work. The test now works on both big-endian and little-endian. 2020-03-05 Richard Biener <rguenther@suse.de> Jakub Jelinek <jakub@redhat.com> PR tree-optimization/93582 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR last operand as signed when looking for memset offset. Formatting fix. * gcc.dg/tree-ssa/pr93582-11.c: New test. Co-authored-by: Richard Biener <rguenther@suse.de>
2020-03-04PR c++/90938 - Initializing array with {1} works but not {0}Martin Sebor
gcc/cp/ChangeLog: PR c++/90938 * tree.c (type_initializer_zero_p): Fail for structs initialized with non-structs. gcc/testsuite/ChangeLog: PR c++/90938 * g++.dg/init/array55.C: New test. * g++.dg/init/array56.C: New test. * g++.dg/cpp2a/nontype-class33.C: New test.
2020-03-05Daily bump.GCC Administrator
2020-03-04Fix format warning which showed up on FreeBSD 11.3.Jeff Law
PR bootstrap/93962 * value-prof.c (dump_histogram_value): Use std::abs.
2020-03-04c++: Fix [[no_unique_address]] and default mem-init [PR90432]Jason Merrill
output_constructor doesn't like two consecutive entries with fields at the same position; let's avoid adding the one for the empty field. gcc/cp/ChangeLog 2020-03-04 Jason Merrill <jason@redhat.com> PR c++/90432 * init.c (perform_member_init): Don't do aggregate initialization of empty field. * constexpr.c (cx_check_missing_mem_inits): Don't enforce initialization of empty field.
2020-03-04PR tree-optimization/93986 - ICE on mixed-precision wide_int argumentsMartin Sebor
gcc/testsuite/ChangeLog: PR tree-optimization/93986 * gcc.dg/pr93986.c: New test. gcc/ChangeLog: PR tree-optimization/93986 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int operands to the same precision widest_int to avoid ICEs.
2020-03-04analyzer: validate region subclassesDavid Malcolm
This patch converts region::validate to a vfunc, implementing additional checking per subclass: verifying that various region_id fields within map_region, array_region, stack_region and root_region are valid, rather than just those within the base class. Doing so caught bugs earlier in follow-up work I have on canonicalization and purging of region_model. gcc/analyzer/ChangeLog: * region-model.cc (region::validate): Convert model param from ptr to reference. Update comment to reflect that it's now a vfunc. (map_region::validate): New vfunc implementation. (array_region::validate): New vfunc implementation. (stack_region::validate): New vfunc implementation. (root_region::validate): New vfunc implementation. (region_model::validate): Pass a reference rather than a pointer to the region::validate vfunc. * region-model.h (region::validate): Make virtual. Convert model param from ptr to reference. (map_region::validate): New vfunc decl. (array_region::validate): New vfunc decl. (stack_region::validate): New vfunc decl. (root_region::validate): New vfunc decl.
2020-03-04analyzer: add regression test for fixed ICE [PR94028]David Malcolm
The C++ reproducer for PR analyzer/94028 generates a similar ICE to that of the Fortran reproducer for PR analyzer/93993 and, like it, was fixed by r10-7023-g3d66e153b40ed000af30a9e569a05f34d5d576aa. This patch adds the C++ reproducer as a regression test. gcc/testsuite/ChangeLog: PR analyzer/94028 * g++.dg/analyzer/pr94028.C: New test.
2020-03-04PR middle-end/81401 - false positive -Wformat-overflow in a loopMartin Sebor
gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/builtin-sprintf-warn-24.c: New test.
2020-03-04Remove unnecessary XFAILs from existing testcase 20050603-3.c.Will Schmidt
The XFAILs in this testcase (20050603-3.c) are no longer necessary since the fix to PR68803 was committed with svn revision r242681. 2020-03-04 Will Schmidt <will_schmidt@vnet.ibm.com> testsuite * gcc.target/powerpc/20050603-3.c: Remove XFAILS.
2020-03-04Add dg-require to existing powerpc/pr93122.c testWill Schmidt
2020-03-04 Will Schmidt <will_schmidt@vnet.ibm.com> * gcc.target/powerpc/pr93122.c: Add dg-require.
2020-03-04analyzer: handle __builtin_expect [PR93993]David Malcolm
The false warning: pr93993.f90:19:0: 19 | allocate (tm) ! { dg-warning "dereference of possibly-NULL" } | Warning: dereference of possibly-NULL ‘_6’ [CWE-690] [-Wanalyzer-possible-null-dereference] in the reproducer for PR analyzer/93993 is due to a BUILTIN_EXPECT in the chain of SSA expressions between the malloc and the condition guarding the edge: the analyzer didn't "know" about the relationship between initial argument to BUILTIN_EXPECT and the return value. This patch implements support for BUILTIN_EXPECT so that the return value is known to be equal to the initial argument. This adds constraints when exploring the CFG edges, eliminating the above false positive. Doing so also eliminated the leak warning from the reproducer. The issue was that leaked_pvs was empty within impl_region_model_context::on_state_leak, due to the leaking region being a view, of type struct Pdtet_8 *, of a region of type struct pdtet_8 *, which led region_model::get_representative_path_var to return a NULL_TREE value. Hence the patch also implements view support for region_model::get_representative_path_var, restoring the leak diagnostic, albeit changing the wording to: Warning: leak of ‘(struct Pdtet_8) qb’ [CWE-401] [-Wanalyzer-malloc-leak] It's not clear to me if we should emit leaks at a fortran "end program" (currently we suppress them for leaks at the end of main). gcc/analyzer/ChangeLog: PR analyzer/93993 * region-model.cc (region_model::on_call_pre): Handle BUILT_IN_EXPECT and its variants. (region_model::add_any_constraints_from_ssa_def_stmt): Split out gassign handling into add_any_constraints_from_gassign; add gcall handling. (region_model::add_any_constraints_from_gassign): New function, based on the above. Add handling for NOP_EXPR. (region_model::add_any_constraints_from_gcall): New function. (region_model::get_representative_path_var): Handle views. * region-model.h (region_model::add_any_constraints_from_ssa_def_stmt): New decl. (region_model::add_any_constraints_from_gassign): New decl. gcc/testsuite/ChangeLog: PR analyzer/93993 * gcc.dg/analyzer/expect-1.c: New test. * gcc.dg/analyzer/malloc-4.c: New test. * gfortran.dg/analyzer/pr93993.f90: Remove xfail from dg-bogus. Move location of leak warning and update message.
2020-03-04analyzer: fix ICE on non-lvalue in prune_for_sm_diagnostic [PR93993]David Malcolm
PR analyzer/93993 reports another ICE within diagnostic_manager::prune_for_sm_diagnostic in which the expression of interest becomes a non-lvalue (similar to PR 93544, PR 93647, and PR 93950), due to attempting to get an lvalue for a non-lvalue with a NULL context, leading to an ICE when the failure is reported to make_region_for_unexpected_tree_code. The tree in question is an ADDR_EXPR of a VAR_DECL, due to: event 11: switching var of interest from ‘tm’ in callee to ‘&qb’ in caller This patch adds more bulletproofing to the routine by introducing a tentative_region_model_context class that can be passed in such circumstances which records that an error occurred, and then checking to see if an error was recorded, thus avoiding the ICE. This is papering over the problem, but a better solution seems more like stage 1 material. The patch also refactors the error-checking for CONSTANT_CLASS_P. The testcase pr93993.f90 has a false positive: pr93993.f90:19:0: 19 | allocate (tm) ! { dg-warning "dereference of possibly-NULL" } | Warning: dereference of possibly-NULL ‘_6’ [CWE-690] [-Wanalyzer-possible-null-dereference] which appears to be a pre-existing bug affecting any allocate call in Fortran, which I will fix in a followup. gcc/analyzer/ChangeLog: PR analyzer/93993 * checker-path.h (state_change_event::get_lvalue): Add ctxt param and pass it to region_model::get_value call. * diagnostic-manager.cc (get_any_origin): Pass a tentative_region_model_context to the calls to get_lvalue and reject the comparison if errors occur. (can_be_expr_of_interest_p): New function. (diagnostic_manager::prune_for_sm_diagnostic): Replace checks for CONSTANT_CLASS_P with calls to update_for_unsuitable_sm_exprs. Pass a tentative_region_model_context to the calls to state_change_event::get_lvalue and reject the comparison if errors occur. (diagnostic_manager::update_for_unsuitable_sm_exprs): New. * diagnostic-manager.h (diagnostic_manager::update_for_unsuitable_sm_exprs): New decl. * region-model.h (class tentative_region_model_context): New class. gcc/testsuite/ChangeLog: PR analyzer/93993 * gfortran.dg/analyzer/pr93993.f90: New test.
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