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11 daysFix PR 110066: crash with -pg -static on riscvAndrew Pinski
The problem -fasynchronous-unwind-tables is on by default for riscv linux We need turn it off for crt*.o because it would make __EH_FRAME_BEGIN__ point to .eh_frame data from crtbeginT.o instead of the user-defined object during static linking. This turns it off. OK? libgcc/ChangeLog: * config.host (riscv*-*-linux*): Add t-crtstuff to tmake_file. (riscv*-*-freebsd*): Likewise. * config/riscv/t-crtstuff: New file. (cherry picked from commit bbc1a102735c72e3c5a4dede8ab382813d12b058)
11 daystree-optimization/114375 - disallow SLP discovery of permuted mask loadsRichard Biener
We cannot currently handle permutations of mask loads in code generation or permute optimization. But we simply drop any permutation on the floor, so the following instead rejects the SLP build rather than producing wrong-code. I've also made sure to reject them in vectorizable_load for completeness. PR tree-optimization/114375 * tree-vect-slp.cc (vect_build_slp_tree_2): Compute the load permutation for masked loads but reject it when any such is necessary. * tree-vect-stmts.cc (vectorizable_load): Reject masked VMAT_ELEMENTWISE and VMAT_STRIDED_SLP as those are not supported. * gcc.dg/vect/vect-pr114375.c: New testcase. (cherry picked from commit 94c3508c5a14d1948fe3bffa9e16c6f3d9c2836a)
11 dayscfgrtl: Fix MEM_EXPR update in duplicate_insn_chain [PR114924]Alex Coplan
The PR shows that when cfgrtl.cc:duplicate_insn_chain attempts to update the MR_DEPENDENCE_CLIQUE information for a MEM_EXPR we can end up accidentally dropping (e.g.) an ARRAY_REF from the MEM_EXPR and end up replacing it with the underlying MEM_REF. This leads to an inconsistency in the MEM_EXPR information, and could lead to wrong code. While the walk down to the MEM_REF is necessary to update MR_DEPENDENCE_CLIQUE, we should use the outer tree expression for the MEM_EXPR. This patch does that. gcc/ChangeLog: PR rtl-optimization/114924 * cfgrtl.cc (duplicate_insn_chain): When updating MEM_EXPRs, don't strip (e.g.) ARRAY_REFs from the final MEM_EXPR. (cherry picked from commit fe40d525619eee9c2821126390df75068df4773a)
11 daysmiddle-end: Fix ICE in poly-int.h due to SLP.Richard Ball
Adds a check to ensure that the input vector arguments to a function are not variable length. Previously, only the output vector of a function was checked. The ICE in question is within the neon-sve-bridge.c test, and is related to https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111268 gcc/ChangeLog: PR tree-optimization/111268 * tree-vect-slp.cc (vectorizable_slp_permutation_1): Add variable-length check for vector input arguments to a function. (cherry picked from commit 4571b4d413a4ba5f1e2d429a2623180ad1c73c0f)
11 days[Committed] Avoid FAIL of gcc.target/i386/pr110792.cRoger Sayle
My apologies (again), I managed to mess up the 64-bit version of the test case for PR 110792. Unlike the 32-bit version, the 64-bit case contains exactly the same load instructions, just in a different order making the correct and incorrect behaviours impossible to distinguish with a scan-assembler-not. Somewhere between checking that this test failed in a clean tree without the patch, and getting the escaping correct, I'd failed to notice that this also FAILs in the patched tree. Doh! Instead of removing the test completely, I've left it as a compilation test. The original fix is tested by the 32-bit test case. Committed to mainline as obvious. Sorry for the incovenience. 2023-08-06 Roger Sayle <roger@nextmovesoftware.com> gcc/testsuite/ChangeLog PR target/110792 * gcc.target/i386/pr110792.c: Remove dg-final scan-assembler-not. (cherry picked from commit 529909f9e92dd3b0ed0383f45a44d2b5f8a58958)
11 daysPR target/110792: Early clobber issues with rot32di2_doubleword on i386.Roger Sayle
This patch is a conservative fix for PR target/110792, a wrong-code regression affecting doubleword rotations by BITS_PER_WORD, which effectively swaps the highpart and lowpart words, when the source to be rotated resides in memory. The issue is that if the register used to hold the lowpart of the destination is mentioned in the address of the memory operand, the current define_insn_and_split unintentionally clobbers it before reading the highpart. Hence, for the testcase, the incorrectly generated code looks like: salq $4, %rdi // calculate address movq WHIRL_S+8(%rdi), %rdi // accidentally clobber addr movq WHIRL_S(%rdi), %rbp // load (wrong) lowpart Traditionally, the textbook way to fix this would be to add an explicit early clobber to the instruction's constraints. (define_insn_and_split "<insn>32di2_doubleword" - [(set (match_operand:DI 0 "register_operand" "=r,r,r") + [(set (match_operand:DI 0 "register_operand" "=r,r,&r") (any_rotate:DI (match_operand:DI 1 "nonimmediate_operand" "0,r,o") (const_int 32)))] but unfortunately this currently generates significantly worse code, due to a strange choice of reloads (effectively memcpy), which ends up looking like: salq $4, %rdi // calculate address movdqa WHIRL_S(%rdi), %xmm0 // load the double word in SSE reg. movaps %xmm0, -16(%rsp) // store the SSE reg back to the stack movq -8(%rsp), %rdi // load highpart movq -16(%rsp), %rbp // load lowpart Note that reload's "&" doesn't distinguish between the memory being early clobbered, vs the registers used in an addressing mode being early clobbered. The fix proposed in this patch is to remove the third alternative, that allowed offsetable memory as an operand, forcing reload to place the operand into a register before the rotation. This results in: salq $4, %rdi movq WHIRL_S(%rdi), %rax movq WHIRL_S+8(%rdi), %rdi movq %rax, %rbp I believe there's a more advanced solution, by swapping the order of the loads (if first destination register is mentioned in the address), or inserting a lea insn (if both destination registers are mentioned in the address), but this fix is a minimal "safe" solution, that should hopefully be suitable for backporting. 2023-08-03 Roger Sayle <roger@nextmovesoftware.com> gcc/ChangeLog PR target/110792 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits place operand in a register before gen_<insn>64ti2_doubleword. (<any_rotate>di3): Likewise, for rotations by 32 bits, place operand in a register before gen_<insn>32di2_doubleword. (<any_rotate>32di2_doubleword): Constrain operand to be in register. (<any_rotate>64ti2_doubleword): Likewise. gcc/testsuite/ChangeLog PR target/110792 * g++.target/i386/pr110792.C: New 32-bit C++ test case. * gcc.target/i386/pr110792.c: New 64-bit C test case. (cherry picked from commit 790c1f60a5662b16eb19eb4b81922995863c7571)
11 daysc++: Add testcase for this PR [PR97990]Andrew Pinski
This testcase was fixed by r14-5934-gf26d68d5d128c8 but we should add one to make sure it does not regress again. Committed as obvious after a quick test on the testcase. PR c++/97990 gcc/testsuite/ChangeLog: * g++.dg/torture/vector-struct-1.C: New test. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com> (cherry picked from commit 5f1438db419c9eb8901d1d1d7f98fb69082aec8e)
11 daysmiddle-end/112732 - stray TYPE_ALIAS_SET in type variantRichard Biener
The following fixes a stray TYPE_ALIAS_SET in a type variant built by build_opaque_vector_type which is diagnosed by type checking enabled with -flto. PR middle-end/112732 * tree.cc (build_opaque_vector_type): Reset TYPE_ALIAS_SET of the newly built type. (cherry picked from commit f26d68d5d128c86faaceeb81b1e8f22254ad53df)
11 daystree-optimization/112281 - loop distribution and zero dependence distancesRichard Biener
The following fixes an omission in dependence testing for loop distribution. When the overall dependence distance is not zero but the dependence direction in the innermost common loop is = there is a conflict between the partitions and we have to merge them. PR tree-optimization/112281 * tree-loop-distribution.cc (loop_distribution::pg_add_dependence_edges): For = in the innermost common loop record a partition conflict. * gcc.dg/torture/pr112281-1.c: New testcase. * gcc.dg/torture/pr112281-2.c: Likewise. (cherry picked from commit 3b34902417259031823bff7f853f615a60464bbd)
11 daystree-optimization/112991 - re-do PR112961 fixRichard Biener
The following does away with the fake edge adding as in the original PR112961 fix and instead exposes handling of entry PHIs as additional parameter of the region VN run. PR tree-optimization/112991 PR tree-optimization/112961 * tree-ssa-sccvn.h (do_rpo_vn): Add skip_entry_phis argument. * tree-ssa-sccvn.cc (do_rpo_vn): Likewise. (do_rpo_vn_1): Likewise, merge with auto-processing. (run_rpo_vn): Adjust. (pass_fre::execute): Likewise. * tree-if-conv.cc (tree_if_conversion): Revert last change. Value-number latch block but disable value-numbering of entry PHIs. * tree-ssa-uninit.cc (execute_early_warn_uninitialized): Adjust. * gcc.dg/torture/pr112991.c: New testcase. * g++.dg/vect/pr112961.cc: Likewise. (cherry picked from commit 93db32a4146afd2a6d90410691351a56768167c9)
11 daysmiddle-end/113396 - int128 array index and value-rangesRichard Biener
The following fixes bogus truncation of a value-range for an int128 array index when computing the maximum extent for a variable array reference. Instead of possibly slowing things down by using widest_int the following makes sure the range bounds fit within the constraints offset_int were designed for. PR middle-end/113396 * tree-dfa.cc (get_ref_base_and_extent): Use index range bounds only if they fit within the address-range constraints of offset_int. * gcc.dg/torture/pr113396.c: New testcase. (cherry picked from commit 6a55e39bdb1fdb570730c08413ebbe744e493411)
12 daysFortran: Generate new charlens for shared symbol typespecs [PR89462]Paul Thomas
2024-04-25 Paul Thomas <pault@gcc.gnu.org> Jakub Jelinek <jakub@gcc.gnu.org> gcc/fortran PR fortran/89462 * decl.cc (build_sym): Add an extra argument 'elem'. If 'elem' is greater than 1, gfc_new_charlen is called to generate a new charlen, registered in the symbol namespace. (variable_decl, enumerator_decl): Set the new argument in the calls to build_sym. gcc/testsuite/ PR fortran/89462 * gfortran.dg/pr89462.f90: New test. (cherry picked from commit 1fd5a07444776d76cdd6a2eee7df0478201197a5)
12 daysFortran: Fix ICE in gfc_trans_create_temp_array from bad type [PR93678]Paul Thomas
2024-04-25 Paul Thomas <pault@gcc.gnu.org> gcc/fortran PR fortran/93678 * trans-expr.cc (gfc_conv_procedure_call): Use the interface, where possible, to obtain the type of character procedure pointers of class entities. gcc/testsuite/ PR fortran/93678 * gfortran.dg/pr93678.f90: New test. (cherry picked from commit c058105bc47a0701e157d1028e60f48554561f9f)
12 daysFortran: Fix ICE in gfc_trans_pointer_assignment [PR113956]Paul Thomas
2024-04-09 Paul Thomas <pault@gcc.gnu.org> gcc/fortran PR fortran/113956 * trans-expr.cc (gfc_trans_pointer_assignment): Remove assert causing the ICE since it was unnecesary. gcc/testsuite/ PR fortran/113956 * gfortran.dg/pr113956.f90: New test. (cherry picked from commit 88aea122a7ee639230bf17a9eda4bf8a5eb7e282)
12 daysFortran: Fix ICE in trans-stmt.cc(gfc_trans_call) [PR114535]Paul Thomas
2024-04-09 Paul Thomas <pault@gcc.gnu.org> gcc/fortran PR fortran/114535 * resolve.cc (resolve_symbol): Remove last chunk that checked for finalization of unreferenced symbols. gcc/testsuite/ PR fortran/114535 * gfortran.dg/pr114535d.f90: New test. * gfortran.dg/pr114535iv.f90: Additional source. (cherry picked from commit de82b0cf981e49a0bda957c0ac31146b17407e23)
12 daysc++/c-common: Fix convert_vector_to_array_for_subscript for qualified vector ↵Andrew Pinski
types [PR89224] After r7-987-gf17a223de829cb, the access for the elements of a vector type would lose the qualifiers. So if we had `constvector[0]`, the type of the element of the array would not have const on it. This was due to a missing build_qualified_type for the inner type of the vector when building the array type. We need to add back the call to build_qualified_type and now the access has the correct qualifiers. So the overloads and even if it is a lvalue or rvalue is correctly done. Note we correctly now reject the testcase gcc.dg/pr83415.c which was incorrectly accepted after r7-987-gf17a223de829cb. Built and tested for aarch64-linux-gnu. PR c++/89224 gcc/c-family/ChangeLog: * c-common.cc (convert_vector_to_array_for_subscript): Call build_qualified_type for the inner type. gcc/cp/ChangeLog: * constexpr.cc (cxx_eval_array_reference): Compare main variants for the vector/array types instead of the types directly. gcc/testsuite/ChangeLog: * g++.dg/torture/vector-subaccess-1.C: New test. * gcc.dg/pr83415.c: Change warning to error. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com> (cherry picked from commit 4421d35167b3083e0f2e4c84c91fded09a30cf22)
12 dayslibstdc++: Fix conversion of simd to vector builtinMatthias Kretz
Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: PR libstdc++/114803 * include/experimental/bits/simd_builtin.h (_SimdBase2::operator __vector_type_t): There is no __builtin() function in _SimdWrapper, instead use its conversion operator. * testsuite/experimental/simd/pr114803_vecbuiltin_cvt.cc: New test. (cherry picked from commit 7ef139146a8923a8719873ca3fdae175668e8d63)
12 dayslibstdc++: Silence irrelevant warnings in <experimental/simd>Matthias Kretz
Avoid -Wnarrowing in C code; -Wtautological-compare in unconditional static_assert (necessary for faking a dependency on a template parameter) Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: * include/experimental/bits/simd.h: Ignore -Wnarrowing for arm_neon.h. (__int_for_sizeof): Replace tautological compare with checking for invalid template parameter value. * include/experimental/bits/simd_builtin.h (__extract_part): Remove tautological compare by combining two static_assert. (cherry picked from commit e7a3ad29c9c832b6ae999cbfb0af89e121959030)
12 dayslibstdc++: Add include guard to simd-internal headerMatthias Kretz
Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: * include/experimental/bits/numeric_traits.h: Add include guard. (cherry picked from commit 3cfe94ad28102618c14a91c0a83d9e5cc7df69d7)
12 dayslibstdc++: Avoid ill-formed types on ARMMatthias Kretz
This resolves failing tests in check-simd. Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: PR libstdc++/114750 * include/experimental/bits/simd_builtin.h (_SimdImplBuiltin::_S_load, _S_store): Fall back to copying scalars if the memory type cannot be vectorized for the target. (cherry picked from commit 0fc7f3c6adc8543f55ec35b309016d9d9c4ddd35)
12 dayslibstdc++: Add masked ++/-- implementation for sizeof < 16Matthias Kretz
This resolves further failures (-Wreturn-type warnings) and test failures for where-* tests targeting AVX-512. Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: * include/experimental/bits/simd_x86.h (_S_masked_unary): Cast inputs < 16 bytes to 16 byte vectors before calling the right subtraction builtin. Before returning, truncate to the return vector type. (cherry picked from commit a6c630c314b099f64d79055964d88b257459cf13)
12 dayslibstdc++: Fix call signature of builtins from masked ++/--Matthias Kretz
This resolves failures in the "expensive" where-* test of check-simd when targeting AVX-512. Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: * include/experimental/bits/simd_x86.h (_S_masked_unary): Call the 4- and 8-byte variants of __builtin_ia32_subp[ds] without rounding direction argument. (cherry picked from commit 0ac2c0f0687b321ab54de271d788b4e0a287b4e2)
12 dayslibstdc++: Avoid vector casts while still avoiding PR90424Matthias Kretz
Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: PR libstdc++/109822 * include/experimental/bits/simd_builtin.h (_S_store): Rewrite to avoid casts to other vector types. Implement store as succession of power-of-2 sized memcpy to avoid PR90424. (cherry picked from commit 9165ede56ababd6471e7a2ce4eab30f3d5129e14)
12 dayslibstdc++: Replace use of incorrect non-temporal storeMatthias Kretz
The call to the base implementation sometimes didn't find a matching signature because the _Abi parameter of _SimdImpl* was "wrong" after conversion. It has to call into <new ABI tag>::_SimdImpl instead of the current ABI tag's _SimdImpl. This also reduces the number of possible template instantiations. Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: PR libstdc++/110054 * include/experimental/bits/simd_builtin.h (_S_masked_store): Call into deduced ABI's SimdImpl after conversion. * include/experimental/bits/simd_x86.h (_S_masked_store_nocvt): Don't use _mm_maskmoveu_si128. Use the generic fall-back implementation. Also fix masked stores without SSE2, which were not doing anything before. (cherry picked from commit 27e45b7597d6fb1a71927d658a0294797b720c0a)
12 dayslibstdc++: Protect against macrosMatthias Kretz
Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: * include/experimental/bits/simd.h (__bit_cast): Use __gnu__::__vector_size__ instead of gnu::vector_size. (cherry picked from commit ce2188e4320cbb46d6246bd3f478ba20440c62f3)
12 dayslibstdc++: Fix condition for supported SIMD types on ARMv8Matthias Kretz
Signed-off-by: Matthias Kretz <m.kretz@gsi.de> libstdc++-v3/ChangeLog: PR libstdc++/110050 * include/experimental/bits/simd.h (__vectorized_sizeof): With __have_neon_a32 only single-precision float works (in addition to integers). (cherry picked from commit 2fbbaa77c8468ed2bdf2cfa1a5890991e4e98eef)
13 daystree-optimization/114121 - wrong VN with context sensitive range infoRichard Biener
When VN ends up exploiting range-info specifying the ao_ref offset and max_size we have to make sure to reflect this in the hashtable entry for the recorded expression. The PR113831 fix handled the case where we can encode this in the operands themselves but this bug shows the issue is more widespread. So instead of altering the operands the following instead records this extra info that's possibly used, only throwing it away when the value-numbering didn't come up with a non-VARYING value which is an important detail to preserve CSE as opposed to constant folding which is where all cases currently known popped up. With this the original PR113831 fix can be reverted. PR tree-optimization/113831 PR tree-optimization/114121 * tree-ssa-sccvn.h (vn_reference_s::offset, vn_reference_s::max_size): New fields. (vn_reference_insert_pieces): Adjust prototype. * tree-ssa-pre.cc (phi_translate_1): Preserve offset/max_size. * tree-ssa-sccvn.cc (vn_reference_eq): Compare offset and size, allow using "don't know" state. (vn_walk_cb_data::finish): Pass along offset/max_size. (vn_reference_lookup_or_insert_for_pieces): Take offset and max_size as argument and use it. (vn_reference_lookup_3): Properly adjust offset and max_size according to the adjusted ao_ref. (vn_reference_lookup_pieces): Initialize offset and max_size. (vn_reference_lookup): Likewise. (vn_reference_lookup_call): Likewise. (vn_reference_insert): Likewise. (visit_reference_op_call): Likewise. (vn_reference_insert_pieces): Take offset and max_size as argument and use it. * gcc.dg/torture/pr113831.c: New testcase. (cherry picked from commit c841144a94363ff26e40ab3f26b14702c32987a8)
13 daysRISC-V: Fix vsetvli local eliminate [PR114747]Kito Cheng
vsetvli local eliminate is only consider the current demand instead of full demand, and it will use that incomplete info to remove vsetvli. Give following example from PR114747: vsetvli a5,a1,e8,m4,ta,mu # 57, ratio=2, sew=8, lmul=4 vsetvli zero,a5,e16,m8,ta,ma # 58, ratio=2, sew=16, lmul=8 vle8.v v8,0(a0) # 13, demand ratio=2 vzext.vf2 v24,v8 # 14, demand sew=16 and lmul=8 Insn #58 will removed because #57 has satisfied demand of #13, but it's not consider #14. It should doing more demand analyze, but this bug only present in GCC 13 branch, and we should not change too much on this release branch, so the best way is make the check more conservative - remove only if the target vsetvl_discard_result having same SEW and LMUL as the source vsetvli. gcc/ChangeLog: PR target/114747 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Check target vsetvl_discard_result and source vsetvli has same SEW and LMUL. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/pr114747.c: New.
13 daysDaily bump.GCC Administrator
13 daysAVR: ipa/92606 - Don't optimize PROGMEM data against non-PROGMEM.Georg-Johann Lay
ipa/92606: Inter-procedural analysis optimizes data across address-spaces and PROGMEM. As of v14, the PROGMEM part is still not fixed (and there is still no target hook as proposed in PR92932). Just disable respective bogus optimization. PR ipa/92606 gcc/ * config/avr/avr.cc (avr_option_override): Set flag_ipa_icf_variables = 0. gcc/testsuite/ * gcc.target/avr/torture/pr92606.c: New test. (cherry picked from commit 08e752e72363ae7fd5a5fcb70913a0f7b240387b)
13 daystree-optimization/114799 - SLP and patternsRichard Biener
The following plugs a hole with computing whether a SLP node has any pattern stmts which is important to know when we want to replace it by a CTOR from external defs. PR tree-optimization/114799 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Properly update ->any_pattern when swapping operands. * gcc.dg/vect/bb-slp-pr114799.c: New testcase. (cherry picked from commit 18e8e55487238237f37f621668fdee316624981a)
13 daystree-optimization/114787 - more careful loop update with CFG cleanupRichard Biener
When CFG cleanup removes a backedge we have to be more careful with loop update. In particular we need to clear niter info and estimates and if we remove the last backedge of a loop we have to also mark it for removal to prevent a following basic block merging to associate loop info with an unrelated header. PR tree-optimization/114787 * tree-cfg.cc (remove_edge_and_dominated_blocks): When removing a loop backedge clear niter info and when removing the last backedge of a loop mark that loop for removal. * gcc.dg/torture/pr114787.c: New testcase. (cherry picked from commit cc48418cfc2e555d837ae9138cbfac23acb3cdf9)
13 daysRISC-V: Add testcase for pr114734Patrick O'Neill
gcc/testsuite/ChangeLog: PR middle-end/114734 * gcc.target/riscv/rvv/autovec/pr114734.c: New test. Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> (cherry picked from commit ff4dc8b10a421cdb0c56f7f8c238609de4f9fbe2)
13 daysmiddle-end/114734 - wrong code with expand_call_mem_refRichard Biener
When expand_call_mem_ref looks at the definition of the address argument to eventually expand a &TARGET_MEM_REF argument together with a masked load it fails to honor constraints imposed by SSA coalescing decisions. The following fixes this. PR middle-end/114734 * internal-fn.cc (expand_call_mem_ref): Use get_gimple_for_ssa_name to get at the def stmt of the address argument to honor SSA coalescing constraints. (cherry picked from commit 4d3a5618de5a949c61605f545f90e81bc0000502)
13 daystree-optimization/114246 - invalid call argument from DSERichard Biener
The following makes sure to strip type conversions added by build_fold_addr_expr before placing the result in a call argument. PR tree-optimization/114246 * tree-ssa-dse.cc (increment_start_addr): Strip useless type conversions from the adjusted address. * gcc.dg/torture/pr114246.c: New testcase. (cherry picked from commit 0249744a9fe0775c2c895727aeebec4c59fd5f95)
13 daystree-optimization/113630 - invalid code hoistingRichard Biener
The following avoids code hoisting (but also PRE insertion) of expressions that got value-numbered to another one that are not a valid replacement (but still compute the same value). This time because the access path ends in a structure with different size, meaning we consider a related access as not trapping because of the size of the base of the access. PR tree-optimization/113630 * tree-ssa-pre.cc (compute_avail): Avoid registering a reference with a representation with not matching base access size. * gcc.dg/torture/pr113630.c: New testcase. (cherry picked from commit 724b64304ff5c8ac08a913509afd6fde38d7b767)
13 daysFortran: Add error for subroutine passed to a variable dummy [PR106999]Paul Thomas
2024-04-02 Paul Thomas <pault@gcc.gnu.org> gcc/fortran PR fortran/106999 * interface.cc (gfc_compare_interfaces): Add error for a subroutine proc pointer passed to a variable formal. (compare_parameter): If a procedure pointer is being passed to a non-procedure formal arg, and there is an an interface, use gfc_compare_interfaces to check and provide a more useful error message. gcc/testsuite/ PR fortran/106999 * gfortran.dg/pr106999.f90: New test. (cherry picked from commit a7aa9455a8b9cb080649a7357b7360f2d99bcbf1)
13 daysFortran: Fix wrong recursive errors and class initialization [PR112407]Paul Thomas
2024-04-02 Paul Thomas <pault@gcc.gnu.org> gcc/fortran PR fortran/112407 * resolve.cc (resolve_procedure_expression): Change the test for for recursion in the case of hidden procedures from modules. (resolve_typebound_static): Add warning for possible recursive calls to typebound procedures. * trans-expr.cc (gfc_trans_class_init_assign): Do not apply default initializer to class dummy where component initializers are all null. gcc/testsuite/ PR fortran/112407 * gfortran.dg/pr112407a.f90: New test. * gfortran.dg/pr112407b.f90: New test. (cherry picked from commit 35408b3669fac104cd380582b32e32c64a603d8b)
13 daysFortran: Fix a gimplifier ICE/wrong result with finalization [PR36337]Paul Thomas
2024-03-29 Paul Thomas <pault@gcc.gnu.org> gcc/fortran PR fortran/36337 PR fortran/110987 PR fortran/113885 * trans-expr.cc (gfc_trans_assignment_1): Place finalization block before rhs post block for elemental rhs. * trans.cc (gfc_finalize_tree_expr): Check directly if a type has no components, rather than the zero components attribute. Treat elemental zero component expressions in the same way as scalars. gcc/testsuite/ PR fortran/113885 * gfortran.dg/finalize_54.f90: New test. * gfortran.dg/finalize_55.f90: New test. gcc/testsuite/ PR fortran/110987 * gfortran.dg/finalize_56.f90: New test. (cherry picked from commit 3c793f0361bc66d2a6bf0b3e1fb3234fc511e2a6)
14 daysFortran: Fix ICE and clear incorrect error messages [PR114739]Paul Thomas
2024-05-06 Paul Thomas <pault@gcc.gnu.org> gcc/fortran PR fortran/114739 * primary.cc (gfc_match_varspec): Check for default type before checking for derived types with the right component name. gcc/testsuite/ PR fortran/114739 * gfortran.dg/pr114739.f90: New test. * gfortran.dg/derived_comp_array_ref_8.f90: Add 'implicit none' for consistency with expected error message. * gfortran.dg/nullify_4.f90: ditto * gfortran.dg/pointer_init_6.f90: ditto * gfortran.dg/pr107397.f90: ditto * gfortran.dg/pr88138.f90: ditto
14 daysDaily bump.GCC Administrator
2024-05-05Daily bump.GCC Administrator
2024-05-04Objective-C, NeXT, v2: Correct a regression in code-gen.Iain Sandoe
There have been several changes in the ABI of Objective-C which depend on the OS version targetted. In this case Protocols and LabelProtocols should be made weak/hidden/extern from macOS 10.7 however there was a mistake in the code causing this to occur from macOS 10.6. Fixed thus. gcc/objc/ChangeLog: * objc-next-runtime-abi-02.cc (WEAK_PROTOCOLS_AFTER): New. (next_runtime_abi_02_protocol_decl): Use WEAK_PROTOCOLS_AFTER to determine this ABI change. (build_v2_protocol_list_address_table): Likewise. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> (cherry picked from commit 9b5c0be59d0f94df0517820f00b4520b5abddd8c)
2024-05-04Daily bump.GCC Administrator
2024-05-03tree-optimization/114749 - reset partial vector decision for no-SLP retryRichard Biener
The following makes sure to reset LOOP_VINFO_USING_PARTIAL_VECTORS_P to its default of false when re-trying without SLP as otherwise analysis may run into bogus asserts. PR tree-optimization/114749 * tree-vect-loop.cc (vect_analyze_loop_2): Reset LOOP_VINFO_USING_PARTIAL_VECTORS_P when re-trying without SLP. (cherry picked from commit bf2b5231312e1cea45732cb8df6ffa2b2c9115b6)
2024-05-03tree-optimization/114736 - SLP DFS walk issueRichard Biener
The following fixes a DFS walk issue when identifying to be ignored latch edges. We have (bogus) SLP_TREE_REPRESENTATIVEs for VEC_PERM nodes so those have to be explicitly ignored as possibly being PHIs. PR tree-optimization/114736 * tree-vect-slp.cc (vect_optimize_slp_pass::is_cfg_latch_edge): Do not consider VEC_PERM_EXPRs as PHI use. * gfortran.dg/vect/pr114736.f90: New testcase. (cherry picked from commit f949481a1f7ab973608a4ffcc0e342ab5a74e8e4)
2024-05-03gcov-profile/114715 - missing coverage for switchRichard Biener
The following avoids missing coverage for the line of a switch statement which happens when gimplification emits a BIND_EXPR wrapping the switch as that prevents us from setting locations on the containing statements via annotate_all_with_location. Instead set the location of the GIMPLE switch directly. PR gcov-profile/114715 * gimplify.cc (gimplify_switch_expr): Set the location of the GIMPLE switch. * gcc.misc-tests/gcov-24.c: New testcase. (cherry picked from commit 9d573f71e80e9f6f4aac912fc8fc128aa2697e3a)
2024-05-03lto/114655 - -flto=4 at link time doesn't override -flto=auto at compile timeRichard Biener
The following adjusts -flto option processing in lto-wrapper to have link-time -flto override any compile time setting. PR lto/114655 * lto-wrapper.cc (merge_flto_options): Add force argument. (merge_and_complain): Do not force here. (run_gcc): But here to make the link-time -flto option override any compile-time one. (cherry picked from commit 32fb04adae90a0ea68e64e8fc3cb04b613b2e9f3)
2024-05-03tree-optimization/114733 - neg induction fails for 1 element vectorsRichard Biener
The neg induction vectorization code isn't prepared to deal with single element vectors. PR tree-optimization/114733 * tree-vect-loop.cc (vectorizable_nonlinear_induction): Reject neg induction vectorization of single element vectors. * gcc.dg/vect/pr114733.c: New testcase. (cherry picked from commit 45a41ace55d0ffb1097e374868242329788ec82a)
2024-05-03tree-optimization/114485 - neg induction with partial vectorsRichard Biener
We can't use vect_update_ivs_after_vectorizer for partial vectors, the following fixes vect_can_peel_nonlinear_iv_p accordingly. PR tree-optimization/114485 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): vect_step_op_neg isn't OK for partial vectors but only for unknown niter. * gcc.dg/vect/pr114485.c: New testcase. (cherry picked from commit 85621f98d245004a6c9787dde21e0acc17ab2c50)