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AgeCommit message (Expand)Author
2021-04-19arm: partial revert of r11-8168 [PR100067]Richard Earnshaw
2021-04-19Fix another -freorder-blocks-and-partition glitch with Windows SEHEric Botcazou
2021-04-17d: Add TARGET_D_TEMPLATES_ALWAYS_COMDATIain Buclaw
2021-04-17d: Implement __traits(getTargetInfo, "objectFormat")Iain Buclaw
2021-04-16aarch64: Don't emit -Wpsabi note when ABI was never affected [PR91710]Jakub Jelinek
2021-04-16SVE: Fix wrong sve predicate split (PR100048)Tamar Christina
2021-04-16aarch64: Fix up 2 other combine opt regressions vs. GCC8 [PR100075]Jakub Jelinek
2021-04-15aarch64: Fix several *<LOGICAL:optab>_ashl<mode>3 related regressions [PR100056]Jakub Jelinek
2021-04-14aarch64: Handle more SVE vector constants [PR99246]Richard Sandiford
2021-04-14IBM Z: Fix error checking for immediate builtin operandsAndreas Krebbel
2021-04-14d: Add TARGET_D_REGISTER_CPU_TARGET_INFOIain Buclaw
2021-04-14d: Add TARGET_D_HAS_STDCALL_CONVENTIONIain Buclaw
2021-04-14arm: fix warning when -mcpu=neoverse-n1 is used with -mfpu=neon [PR100067]Richard Earnshaw
2021-04-13aarch64: Restore bfxil optimization [PR100028]Jakub Jelinek
2021-04-12IBM Z: Add alternative to *movdi_{31,64} in order to load a DFP zeroStefan Schulze Frielinghaus
2021-04-12Add rocketlake to gcc.Cui,Lili
2021-04-12Change march=alderlake ISA list and add m_ALDERLAKE to m_CORE_AVX2Cui,Lili
2021-04-10x86: Define _serialize as macroH.J. Lu
2021-04-09aarch64: Fix push/pop_options with --with-cpuRichard Sandiford
2021-04-09aarch64: Use x30 as temporary in SVE TLSDESC patternsRichard Sandiford
2021-04-08aix: revert TLS common changeDavid Edelsohn
2021-04-08VAX: Fix comment for `*bit<mode>' pattern's peepholeMaciej W. Rozycki
2021-04-08arm: Various MVE vec_duplicate fixes [PR99647]Alex Coplan
2021-04-06C-SKY: Describe ck802 bypass accurately.Xianmiao Qu
2021-04-06x86: Update memcpy/memset inline strategies for Skylake family CPUsH.J. Lu
2021-04-06arm: Fix PCS for SFmode -> SImode libcalls [PR99748]Alex Coplan
2021-04-03Darwin : Fix out-of-bounds access to df_regs_ever_live.Iain Sandoe
2021-04-03Darwin : Fix whitespace and delete unused code (NFC).Iain Sandoe
2021-04-03rs6000: Avoid -fpatchable-function-entry* regressions on powerpc64 be [PR98125]Jakub Jelinek
2021-03-31Update prefixed attribute for Power10.Pat Haugen
2021-03-31Handle CONST_POLY_INTs in CONST_VECTORs [PR97141, PR98726]Richard Sandiford
2021-03-31arm: Fix mult autovectorization patterm for iwmmxt (PR target/99786)Christophe Lyon
2021-03-31x86: Update memcpy/memset inline strategies for Ice LakeH.J. Lu
2021-03-31aarch64: Fix target alignment for SVE [PR98119]Richard Sandiford
2021-03-31aarch64: Fix up *add<mode>3_poly_1 [PR99813]Jakub Jelinek
2021-03-31i386, debug: Default to -gdwarf-4 on Windows targets with broken ld.bfd [PR98...Jakub Jelinek
2021-03-30aarch64: PR target/99820: Guard on available SVE issue info before usingKyrylo Tkachov
2021-03-30aarch64: PR target/99822 Don't allow zero register in first operand of SUBS/A...Kyrylo Tkachov
2021-03-30rs6000: Enable 32bit variable vec_insert [PR99718]luoxhu@cn.ibm.com
2021-03-30x86: Define __rdtsc and __rdtscp as macrosH.J. Lu
2021-03-30arm: Fix emission of Tag_ABI_VFP_args with MVE and -mfloat-abi=hard (PR targe...Christophe Lyon
2021-03-30aarch64: Tweak post-RA handling of CONST_INT moves [PR98136]Richard Sandiford
2021-03-30aarch64: Prevent use of SIMD fcvtz[su] instruction variant with "nosimd"Mihailo Stojanovic
2021-03-29aarch64: Fix SVE ACLE builtins with LTO [PR99216]Alex Coplan
2021-03-29aarch64: PR target/99037 Fix RTL represntation in move_lo_quad patternsKyrylo Tkachov
2021-03-28aix: TLS DWARF symbol decorations.David Edelsohn
2021-03-26aix: ABI struct alignment (PR99557)David Edelsohn
2021-03-26aarch64: Add costs for LD[34] and ST[34] postincrementsRichard Sandiford
2021-03-26aarch64: Take issue rate into account for vector loop costsRichard Sandiford
2021-03-26aarch64: Ignore inductions when costing vector codeRichard Sandiford
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