diff options
| author | Daniel Cederman <cederman@gaisler.com> | 2018-05-30 09:52:18 +0000 |
|---|---|---|
| committer | Daniel Cederman <cederman@gaisler.com> | 2018-05-30 09:52:18 +0000 |
| commit | fc1eef35a4a46a5c3d322cb053c454acd4481500 (patch) | |
| tree | 187a7dfa0993a1f49e951deed679bcd5c903b9e6 | |
| parent | a049b2d5f4621dd623dd67064f996a5f644e69de (diff) | |
[Sparc] Treat %fxx registers with value type Other as single precision
They get type Other when used in the clobber list in inline assembly.
This fixes tests fp128.ll and float.ll that failed after r333512.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333523 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Sparc/SparcISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Sparc/SparcISelLowering.cpp b/lib/Target/Sparc/SparcISelLowering.cpp index f4484d12c89..3b04038ffcc 100644 --- a/lib/Target/Sparc/SparcISelLowering.cpp +++ b/lib/Target/Sparc/SparcISelLowering.cpp @@ -3517,7 +3517,7 @@ SparcTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, !name.substr(1).getAsInteger(10, intVal) && intVal <= 63) { std::string newConstraint; - if (VT == MVT::f32) { + if (VT == MVT::f32 || VT == MVT::Other) { newConstraint = "{f" + utostr(intVal) + "}"; } else if (VT == MVT::f64 && (intVal % 2 == 0)) { newConstraint = "{d" + utostr(intVal / 2) + "}"; |