diff options
| author | Heyi Guo <heyi.guo@linaro.org> | 2016-11-11 14:38:01 +0800 |
|---|---|---|
| committer | Leif Lindholm <leif.lindholm@linaro.org> | 2016-12-08 12:52:18 +0000 |
| commit | 06785b8035f628f9c24412d73a0ca4fcb1e7681e (patch) | |
| tree | 9a1620a4da5e8c3e1a0d59578e7e5f6466c1c589 | |
| parent | 9c79eeef9f7ac124176e1c104f80fc088b57b8db (diff) | |
Hisilicon: Remove unnesseary variable initializtion
The variable will be initialized in the function code,
so it is not nesseary to be filled a data in the definition.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
| -rw-r--r-- | Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c b/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c index 005d28f..61473e8 100644 --- a/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c +++ b/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c @@ -226,7 +226,7 @@ GetCacheSocketStr ( OUT CHAR16 *CacheSocketStr
)
{
- UINTN CacheSocketStrLen = 0;
+ UINTN CacheSocketStrLen;
if(CacheLevel == CPU_CACHE_L1_Instruction)
{
@@ -258,7 +258,6 @@ UpdateSmbiosCacheTable ( CACHE_SRAM_TYPE_DATA CacheSramType = {0};
CoreCount = 16; // Default value is 16 Core
- CacheSize = 0;
//
// Set Cache Configuration
|