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authorRyan Harkin <ryan.harkin@linaro.org>2016-02-03 17:13:40 +0000
committerLeif Lindholm <leif.lindholm@linaro.org>2016-02-04 13:16:51 +0000
commit50babddd0cb440742bf4d0341f319239317eba5d (patch)
treefc48538868eced1253090012f19e98bd62e23804
parent228725cb54e3b74c95f8ca2942d64add4cd79326 (diff)
Platforms/ARM: FVP: remove Sec.inf
The Sec binary has not been used ever since the introduction of ARM Trusted Firmware, so remove this untested binary from our builds. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
-rw-r--r--Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc9
-rw-r--r--Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf52
2 files changed, 0 insertions, 61 deletions
diff --git a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc
index 9832f02..c0c80e2 100644
--- a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc
+++ b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc
@@ -205,15 +205,6 @@
[Components.common]
#
- # SEC
- #
- ArmPlatformPkg/Sec/Sec.inf {
- <LibraryClasses>
- # Use the implementation which set the Secure bits
- ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
- }
-
- #
# PEI Phase modules
#
!ifdef EDK2_SKIP_PEICORE
diff --git a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf
index 2bdb635..9923081 100644
--- a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf
+++ b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf
@@ -24,35 +24,6 @@
#
################################################################################
-[FD.FVP_AARCH64_EFI_SEC]
-BaseAddress = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in SecureROM.
-Size = 0x04000000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the device (64MiB).
-ErasePolarity = 1
-
-# This one is tricky, it must be: BlockSize * NumBlocks = Size
-BlockSize = 0x00001000
-NumBlocks = 0x4000
-
-################################################################################
-#
-# Following are lists of FD Region layout which correspond to the locations of different
-# images within the flash device.
-#
-# Regions must be defined in ascending order and may not overlap.
-#
-# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
-# the pipe "|" character, followed by the size of the region, also in hex with the leading
-# "0x" characters. Like:
-# Offset|Size
-# PcdOffsetCName|PcdSizeCName
-# RegionType <FV, DATA, or FILE>
-#
-################################################################################
-
-0x00000000|0x00080000
-gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
-FV = FVMAIN_SEC
-
[FD.FVP_AARCH64_EFI]
!ifdef ARM_FVP_RUN_NORFLASH
BaseAddress = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in Flash0.
@@ -81,29 +52,6 @@ FV = FVMAIN_COMPACT
#
################################################################################
-[FV.FVMAIN_SEC]
-FvBaseAddress = 0x0 # Secure ROM
-FvForceRebase = TRUE
-FvAlignment = 16
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
- INF ArmPlatformPkg/Sec/Sec.inf
-
-
[FV.FvMain]
BlockSize = 0x40
NumBlocks = 0 # This FV gets compressed so make it just big enough