diff options
author | Mazen NEIFER <mazen@nestwave.com> | 2017-01-30 12:36:10 +0100 |
---|---|---|
committer | Andrew Boie <andrew.p.boie@intel.com> | 2017-01-30 09:04:12 -0800 |
commit | 60ca465ac8a8271af5a0bd2cee8bfe4e0d4fb1b1 (patch) | |
tree | cf4eef9afb0c4d14604f7764a0ba9a1fb9889a05 | |
parent | 5b34a9fbd19c98705a20c7d8172012a0bd499cd2 (diff) |
Xtensa port: Removed compiler warnings about printf formats/arguments mismatch.core
Change-Id: Ie430072243911dc74263dbd7afe8703d0b3c4731
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
-rw-r--r-- | arch/xtensa/core/fatal.c | 2 | ||||
-rw-r--r-- | arch/xtensa/core/thread.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/xtensa/core/fatal.c b/arch/xtensa/core/fatal.c index eafab0570..006267af9 100644 --- a/arch/xtensa/core/fatal.c +++ b/arch/xtensa/core/fatal.c @@ -54,7 +54,7 @@ void _NanoFatalErrorHandler(unsigned int reason, const NANO_ESF *pEsf) PR_EXC("**** Unknown Fatal Error %d! ****\n", reason); break; } - PR_EXC("Current thread ID = 0x%x\n" + PR_EXC("Current thread ID = %p\n" "Faulting instruction address = 0x%x\n", k_current_get(), pEsf->pc); diff --git a/arch/xtensa/core/thread.c b/arch/xtensa/core/thread.c index 02b6b5a2e..9cff0b121 100644 --- a/arch/xtensa/core/thread.c +++ b/arch/xtensa/core/thread.c @@ -105,7 +105,7 @@ void _new_thread(char *pStack, size_t stackSize, (uint32_t)stackEnd - XT_CP_SA_SIZE; #ifdef CONFIG_DEBUG printk("cpStack = %p\n", tcs->arch.preempCoprocReg.cpStack); - printk("cpAsa = %p\n", *(uint32_t *)(tcs->arch.preempCoprocReg.cpStack + XT_CP_ASA)); + printk("cpAsa = %p\n", *(void **)(tcs->arch.preempCoprocReg.cpStack + XT_CP_ASA)); #endif #endif /* Thread's first frame alignment is granted as both operands are aligned */ |