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authorKukjin Kim <kgene.kim@samsung.com>2012-05-12 16:45:47 +0900
committerKukjin Kim <kgene.kim@samsung.com>2012-05-13 08:31:53 +0900
commit28b874a8ba7aed5152dc426dde38239ce23d8b37 (patch)
tree25e0f21b829a22f042b11817664709155179eb30
parentfd717cd7c995644d149a5481c3894b748c082909 (diff)
ARM: EXYNOS: fix ctrlbit for exynos5_clk_pdma1
It should be (1 << 2) for ctrlbit of exynos5_clk_pdma1. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r--arch/arm/mach-exynos/clock-exynos5.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index 5cd7a8b8868..7ac6ff4c46b 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -678,7 +678,7 @@ static struct clk exynos5_clk_pdma1 = {
.name = "dma",
.devname = "dma-pl330.1",
.enable = exynos5_clk_ip_fsys_ctrl,
- .ctrlbit = (1 << 1),
+ .ctrlbit = (1 << 2),
};
static struct clk exynos5_clk_mdma1 = {