diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-07-05 11:57:23 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-08-05 19:04:01 +0200 |
| commit | 63cf9a131ee60fa2458d75f5c0d7a3a5dcaa2b3e (patch) | |
| tree | aba2668e4e3c4beffc0f18ed88829c39e0af59c0 | |
| parent | e5d5019e95415a99b1c0bca3dab6d8fcd39f4c65 (diff) | |
drm/i915: Add SNB/IVB support to intel_read_wm_latency
SNB and IVB have slightly a different way to read out the
watermark latency values.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index b6430bacc7d..da1b6412161 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2365,6 +2365,13 @@ static void intel_read_wm_latency(struct drm_device *dev, uint16_t wm[5]) wm[2] = (sskpd >> 12) & 0xFF; wm[3] = (sskpd >> 20) & 0x1FF; wm[4] = (sskpd >> 32) & 0x1FF; + } else if (INTEL_INFO(dev)->gen >= 6) { + uint32_t sskpd = I915_READ(MCH_SSKPD); + + wm[0] = (sskpd >> SSKPD_WM0_SHIFT) & SSKPD_WM_MASK; + wm[1] = (sskpd >> SSKPD_WM1_SHIFT) & SSKPD_WM_MASK; + wm[2] = (sskpd >> SSKPD_WM2_SHIFT) & SSKPD_WM_MASK; + wm[3] = (sskpd >> SSKPD_WM3_SHIFT) & SSKPD_WM_MASK; } } |