diff options
author | Arve Hjønnevåg <arve@android.com> | 2012-11-30 17:05:40 -0800 |
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committer | Arve Hjønnevåg <arve@android.com> | 2013-04-29 14:52:29 -0700 |
commit | c73646f95fb13b99a771ca5141d6b0993ca6dac3 (patch) | |
tree | 5c649f37a46a901f4efaf5602797456e2a18d3e8 | |
parent | e798c9d8db5397de6208c89b8d3e0cceb5e01bd3 (diff) |
ARM: decompressor: Flush tlb before swiching domain 0 to client mode
If the bootloader used a page table that is incompatible with domain 0
in client mode, and boots with the mmu on, then swithing domain 0 to
client mode causes a fault if we don't flush the tlb after updating
the page table pointer.
v2: Add ISB before loading dacr.
Signed-off-by: Arve Hjønnevåg <arve@android.com>
-rw-r--r-- | arch/arm/boot/compressed/head.S | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index a2361900db1..9a94f344df4 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -716,6 +716,8 @@ __armv7_mmu_cache_on: bic r6, r6, #1 << 31 @ 32-bit translation system bic r6, r6, #3 << 0 @ use only ttbr0 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer + mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs + mcr p15, 0, r0, c7, c5, 4 @ ISB mcrne p15, 0, r1, c3, c0, 0 @ load domain access control mcrne p15, 0, r6, c2, c0, 2 @ load ttb control #endif |