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authorAlexander Gordeev <agordeev@redhat.com>2013-12-30 08:28:15 +0100
committerBjorn Helgaas <bhelgaas@google.com>2014-01-03 17:17:55 -0700
commitff1aa430a2fa43189e89c7ddd559f0bee2298288 (patch)
tree731237d3f796f92aa31b41a8fda7f0e38c707fbb /Documentation/PCI
parent7b92b4f61ec49cb1a5813298f35258bd7ecd3667 (diff)
PCI/MSI: Add pci_msix_vec_count()
This creates an MSI-X counterpart for pci_msi_vec_count(). Device drivers can use this function to obtain maximum number of MSI-X interrupts the device supports and use that number in a subsequent call to pci_enable_msix(). pci_msix_vec_count() supersedes pci_msix_table_size() and returns a negative errno if device does not support MSI-X interrupts. After this update, callers must always check the returned value. The only user of pci_msix_table_size() was the PCI-Express port driver, which is also updated by this change. Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'Documentation/PCI')
-rw-r--r--Documentation/PCI/MSI-HOWTO.txt13
1 files changed, 13 insertions, 0 deletions
diff --git a/Documentation/PCI/MSI-HOWTO.txt b/Documentation/PCI/MSI-HOWTO.txt
index aa4ad987510..b58f4a4d14b 100644
--- a/Documentation/PCI/MSI-HOWTO.txt
+++ b/Documentation/PCI/MSI-HOWTO.txt
@@ -243,6 +243,19 @@ MSI-X Table. This address is mapped by the PCI subsystem, and should not
be accessed directly by the device driver. If the driver wishes to
mask or unmask an interrupt, it should call disable_irq() / enable_irq().
+4.3.4 pci_msix_vec_count
+
+int pci_msix_vec_count(struct pci_dev *dev)
+
+This function could be used to retrieve number of entries in the device
+MSI-X table.
+
+If this function returns a negative number, it indicates the device is
+not capable of sending MSI-Xs.
+
+If this function returns a positive number, it indicates the maximum
+number of MSI-X interrupt vectors that could be allocated.
+
4.4 Handling devices implementing both MSI and MSI-X capabilities
If a device implements both MSI and MSI-X capabilities, it can