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authorLinus Torvalds <torvalds@linux-foundation.org>2012-12-11 11:30:41 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2012-12-11 11:30:41 -0800
commitb58ed041a360ed051fab17e4d9b0f451c6fedba7 (patch)
treec21db4bc5042821cae320213652b2dbec880a58d /Documentation/devicetree/bindings/arm
parent259cdbee2094d28b72f0f3d77bc9203d682994ff (diff)
parent58fea354d887fddddd342a8d14b02069161ca904 (diff)
Merge tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux-2.6
Pull device tree changes from Grant Likely: "Here are the DT changes I've got queued up for v3.8. As described below, there are a lot of bug fixes here and documentation updates but nothing major: Bug fixes, little cleanups, and documentation changes. The most invasive thing here touches a bunch of the arch directories to use a common build rule for .dtb files. There are no major changes to functionality here other than a few new helper functions." * tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux-2.6: (34 commits) arm64: Fix the dtbs target building mtd: nand: davinci: fix the binding documentation rtc: rtc-mv: Add the device tree binding documentation devicetree/bindings: Move gpio-leds binding into leds directory of/vendor-prefixes: add Imagination Technologies microblaze: use new common dtc rule c6x: use new common dtc rule openrisc: use new common dtc rule arm64: Add dtbs target for building all the enabled dtb files arm64: use new common dtc rule ARM: dt: change .dtb build rules to build in dts directory kbuild: centralize .dts->.dtb rule Fix build when CONFIG_W1_MASTER_GPIO=m b exporting "allnodes" of/spi: Honour "status=disabled" property of device of_mdio: Honour "status=disabled" property of device of_i2c: Honour "status=disabled" property of device powerpc: Fix fallout from device_node->name constification of: add 'const' for of_parse_phandle parameter *np Documentation: correct of_platform_populate() argument list script: dtc: clean generated files ...
Diffstat (limited to 'Documentation/devicetree/bindings/arm')
-rw-r--r--Documentation/devicetree/bindings/arm/davinci/nand.txt37
-rw-r--r--Documentation/devicetree/bindings/arm/l2cc.txt2
2 files changed, 13 insertions, 26 deletions
diff --git a/Documentation/devicetree/bindings/arm/davinci/nand.txt b/Documentation/devicetree/bindings/arm/davinci/nand.txt
index e37241f1fdd..49fc7ada929 100644
--- a/Documentation/devicetree/bindings/arm/davinci/nand.txt
+++ b/Documentation/devicetree/bindings/arm/davinci/nand.txt
@@ -23,29 +23,16 @@ Recommended properties :
- ti,davinci-nand-buswidth: buswidth 8 or 16
- ti,davinci-nand-use-bbt: use flash based bad block table support.
-Example (enbw_cmc board):
-aemif@60000000 {
- compatible = "ti,davinci-aemif";
- #address-cells = <2>;
- #size-cells = <1>;
- reg = <0x68000000 0x80000>;
- ranges = <2 0 0x60000000 0x02000000
- 3 0 0x62000000 0x02000000
- 4 0 0x64000000 0x02000000
- 5 0 0x66000000 0x02000000
- 6 0 0x68000000 0x02000000>;
- nand@3,0 {
- compatible = "ti,davinci-nand";
- reg = <3 0x0 0x807ff
- 6 0x0 0x8000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ti,davinci-chipselect = <1>;
- ti,davinci-mask-ale = <0>;
- ti,davinci-mask-cle = <0>;
- ti,davinci-mask-chipsel = <0>;
- ti,davinci-ecc-mode = "hw";
- ti,davinci-ecc-bits = <4>;
- ti,davinci-nand-use-bbt;
- };
+Example(da850 EVM ):
+nand_cs3@62000000 {
+ compatible = "ti,davinci-nand";
+ reg = <0x62000000 0x807ff
+ 0x68000000 0x8000>;
+ ti,davinci-chipselect = <1>;
+ ti,davinci-mask-ale = <0>;
+ ti,davinci-mask-cle = <0>;
+ ti,davinci-mask-chipsel = <0>;
+ ti,davinci-ecc-mode = "hw";
+ ti,davinci-ecc-bits = <4>;
+ ti,davinci-nand-use-bbt;
};
diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt
index 7ca52161e7a..7c3ee3aeb7b 100644
--- a/Documentation/devicetree/bindings/arm/l2cc.txt
+++ b/Documentation/devicetree/bindings/arm/l2cc.txt
@@ -37,7 +37,7 @@ L2: cache-controller {
reg = <0xfff12000 0x1000>;
arm,data-latency = <1 1 1>;
arm,tag-latency = <2 2 2>;
- arm,filter-latency = <0x80000000 0x8000000>;
+ arm,filter-ranges = <0x80000000 0x8000000>;
cache-unified;
cache-level = <2>;
interrupts = <45>;