diff options
| author | James Morris <jmorris@namei.org> | 2011-04-19 21:32:41 +1000 |
|---|---|---|
| committer | James Morris <jmorris@namei.org> | 2011-04-19 21:32:41 +1000 |
| commit | d4ab4e6a23f805abb8fc3cc34525eec3788aeca1 (patch) | |
| tree | eefd82c155bc27469a85667d759cd90facf4a6e3 /Documentation/spi | |
| parent | c0fa797ae6cd02ff87c0bfe0d509368a3b45640e (diff) | |
| parent | 96fd2d57b8252e16dfacf8941f7a74a6119197f5 (diff) | |
Merge branch 'master'; commit 'v2.6.39-rc3' into next
Diffstat (limited to 'Documentation/spi')
| -rw-r--r-- | Documentation/spi/pxa2xx | 2 | ||||
| -rw-r--r-- | Documentation/spi/spi-lm70llp | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/spi/pxa2xx b/Documentation/spi/pxa2xx index 68a4fe3818a..493dada5737 100644 --- a/Documentation/spi/pxa2xx +++ b/Documentation/spi/pxa2xx @@ -143,7 +143,7 @@ configured to use SSPFRM instead. NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the chipselect is dropped after each spi_transfer. Most devices need chip select asserted around the complete message. Use SSPFRM as a GPIO (through cs_control) -to accomodate these chips. +to accommodate these chips. NSSP SLAVE SAMPLE diff --git a/Documentation/spi/spi-lm70llp b/Documentation/spi/spi-lm70llp index 34a9cfd746b..463f6d01fa1 100644 --- a/Documentation/spi/spi-lm70llp +++ b/Documentation/spi/spi-lm70llp @@ -46,7 +46,7 @@ The hardware interfacing on the LM70 LLP eval board is as follows: Note that since the LM70 uses a "3-wire" variant of SPI, the SI/SO pin is connected to both pin D7 (as Master Out) and Select (as Master In) -using an arrangment that lets either the parport or the LM70 pull the +using an arrangement that lets either the parport or the LM70 pull the pin low. This can't be shared with true SPI devices, but other 3-wire devices might share the same SI/SO pin. |