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authorLiviu Dudau <Liviu.Dudau@arm.com>2014-02-20 12:54:48 +0000
committerJon Medhurst <tixy@linaro.org>2014-04-09 18:55:11 +0100
commitbab9b19bafe00a0022b9f2dd0a615cbb111aeca6 (patch)
tree62071de2f717f3a03ce9528ddb588942e721c763 /Documentation
parent5bc83dcd789a064f9b0d902796a6cb77e0fa7a45 (diff)
misc: Add support for communication with System Control and Power unit via MHU.
Modern ARM systems contain a System Control and Power unit that allows for control of compute cores and clusters, oscillator setup, wakeup timers and even system reset. This driver adds support for communication with the SCP via the Message Handling Unit hardware. Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Diffstat (limited to 'Documentation')
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+ARM SCPI MHU driver.
+
+This driver uses the Message Handling Unit hardware to talk with
+a System Controll Processor using the SCPI interface.
+
+Required properties:
+ - compatible: "arm,scpi-mhu"
+ - reg: two pairs of register address and size data, first for the
+ start of the MHU registers area, second for the payload area.
+ - interrupts: Interrupt list for low priority and high priority
+ channel, in that order.
+ - #clock-cells: from common clock bindings; should be set to 1 if
+ the SCP offers support for controlling oscillator frequencies, 0
+ otherwise.
+ - clock-output-names: List of names for the the oscillator output(s).
+
+
+Examples:
+ scp: scp@2b1f0000 {
+ compatible = "arm,scpi-mhu";
+ reg = <0x0 0x2b1f0000 0x0 0x10000>, /* MHU registers */
+ <0x0 0x2e000000 0x0 0x10000>; /* Payload area */
+ interrupts = <0 36 4>, /* low priority channel interrupt */
+ <0 35 4>, /* high priority channel interrupt */
+ <0 37 4>; /* secure channel interrupt */
+ #clock-cells = <1>;
+ clock-output-names= "a57", "a53", "gpu", hdlcd0", "hdlcd1";
+ };
+