diff options
author | Liviu Dudau <Liviu.Dudau@arm.com> | 2014-02-20 12:54:48 +0000 |
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committer | Jon Medhurst <tixy@linaro.org> | 2014-04-09 18:55:11 +0100 |
commit | bab9b19bafe00a0022b9f2dd0a615cbb111aeca6 (patch) | |
tree | 62071de2f717f3a03ce9528ddb588942e721c763 /Documentation | |
parent | 5bc83dcd789a064f9b0d902796a6cb77e0fa7a45 (diff) |
misc: Add support for communication with System Control and Power unit via MHU.
Modern ARM systems contain a System Control and Power unit that allows
for control of compute cores and clusters, oscillator setup, wakeup
timers and even system reset. This driver adds support for communication
with the SCP via the Message Handling Unit hardware.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/misc/arm,scpi-mhu.txt | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/misc/arm,scpi-mhu.txt b/Documentation/devicetree/bindings/misc/arm,scpi-mhu.txt new file mode 100644 index 00000000000..753a219de84 --- /dev/null +++ b/Documentation/devicetree/bindings/misc/arm,scpi-mhu.txt @@ -0,0 +1,29 @@ +ARM SCPI MHU driver. + +This driver uses the Message Handling Unit hardware to talk with +a System Controll Processor using the SCPI interface. + +Required properties: + - compatible: "arm,scpi-mhu" + - reg: two pairs of register address and size data, first for the + start of the MHU registers area, second for the payload area. + - interrupts: Interrupt list for low priority and high priority + channel, in that order. + - #clock-cells: from common clock bindings; should be set to 1 if + the SCP offers support for controlling oscillator frequencies, 0 + otherwise. + - clock-output-names: List of names for the the oscillator output(s). + + +Examples: + scp: scp@2b1f0000 { + compatible = "arm,scpi-mhu"; + reg = <0x0 0x2b1f0000 0x0 0x10000>, /* MHU registers */ + <0x0 0x2e000000 0x0 0x10000>; /* Payload area */ + interrupts = <0 36 4>, /* low priority channel interrupt */ + <0 35 4>, /* high priority channel interrupt */ + <0 37 4>; /* secure channel interrupt */ + #clock-cells = <1>; + clock-output-names= "a57", "a53", "gpu", hdlcd0", "hdlcd1"; + }; + |