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authorNicolas Pitre <nicolas.pitre@linaro.org>2012-07-05 21:33:26 -0400
committerNicolas Pitre <nicolas.pitre@linaro.org>2013-05-13 19:02:06 -0400
commit8377eace77f29520928b6c675ead3c9a2bac10f3 (patch)
tree3ca8062d06441a9f632e0ee055af6f5d527c7238 /arch/arm/common/bL_switcher.c
parent8f4f5923eee935287e777a489c185e2517a89534 (diff)
ARM: bL_switcher: do not hardcode GIC IDs in the code
Currently, GIC IDs are hardcoded making the code dependent on the x4 b.L configuration. Let's allow for GIC IDs to be discovered upon switcher initialization to support other b.L configurations such as the x1 one. Signed-off-by: Nicolas Pitre <nico@linaro.org>
Diffstat (limited to 'arch/arm/common/bL_switcher.c')
-rw-r--r--arch/arm/common/bL_switcher.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm/common/bL_switcher.c b/arch/arm/common/bL_switcher.c
index bcc1e06afc8..1ee777df022 100644
--- a/arch/arm/common/bL_switcher.c
+++ b/arch/arm/common/bL_switcher.c
@@ -111,6 +111,8 @@ static int bL_switchpoint(unsigned long _arg)
* Generic switcher interface
*/
+static unsigned int bL_gic_id[MAX_CPUS_PER_CLUSTER][MAX_NR_CLUSTERS];
+
/*
* bL_switch_to - Switch to a specific cluster for the current CPU
* @new_cluster_id: the ID of the cluster to switch to.
@@ -160,7 +162,7 @@ static int bL_switch_to(unsigned int new_cluster_id)
this_cpu = smp_processor_id();
/* redirect GIC's SGIs to our counterpart */
- gic_migrate_target(cpuid + ib_cluster*4);
+ gic_migrate_target(bL_gic_id[cpuid][ib_cluster]);
/*
* Raise a SGI on the inbound CPU to make sure it doesn't stall
@@ -340,6 +342,16 @@ static int __init bL_switcher_halve_cpus(void)
cluster = (cpu_logical_map(i) >> 8) & 0xff;
if (cpumask_test_cpu(cpu, &common_mask)) {
+ /* Let's take note of the GIC ID for this CPU */
+ int gic_id = gic_get_cpu_id(i);
+ if (gic_id < 0) {
+ pr_err("%s: bad GIC ID for CPU %d\n", __func__, i);
+ return -EINVAL;
+ }
+ bL_gic_id[cpu][cluster] = gic_id;
+ pr_info("GIC ID for CPU %u cluster %u is %u\n",
+ cpu, cluster, gic_id);
+
/*
* We keep only those logical CPUs which number
* is equal to their physical CPU number. This is