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authorRob Herring <rob.herring@calxeda.com>2013-03-25 17:02:48 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-04-03 16:45:48 +0100
commit6e7aceeb7c70b9ebad79bcfe91fcf738826e8e6d (patch)
treec19024ea5670f04acb90b9ae4d9bc3224ce84e0f /arch/arm/include/asm/mmu_context.h
parent698613b63817f2f6ca79831cd1c37aae67025323 (diff)
ARM: 7682/1: cache-l2x0: fix masking of RTL revision numbering and set_debug init
Commit b8db6b8 (ARM: 7547/4: cache-l2x0: add support for Aurora L2 cache ctrl) moved the masking of the part ID which caused the RTL version to be lost. Commit 6248d06 (ARM: 7545/1: cache-l2x0: make outer_cache_fns a field of l2x0_of_data) changed how .set_debug is initialized. Both commits break commit 74ddcdb (ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlier) which uses the RTL version to conditionally set .set_debug function pointer. Commit b8db6b8 also caused the printed cache ID to be missing the version information. Fix this by reverting how the part number is masked so the RTL version info is maintained. The cache-id-part DT property does not set the RTL bits so masking them should have no effect. Also, re-arrange the order of the function pointer init so the .set_debug function can be overridden. Reported-by: Paolo Pisati <paolo.pisati@canonical.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Yehuda Yitschak <yehuday@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/mmu_context.h')
0 files changed, 0 insertions, 0 deletions