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authorWill Deacon <will.deacon@arm.com>2013-02-28 17:47:36 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-03-03 22:54:14 +0000
commit8a4e3a9ead7e37ce1505602b564c15da09ac039f (patch)
tree5cc8ad188810649ea0739c769977451b825e4325 /arch/arm/include/asm/tlbflush.h
parent37f47e3d62533c931b04cb409f2eb299e6342331 (diff)
ARM: 7659/1: mm: make mm->context.id an atomic64_t variable
mm->context.id is updated under asid_lock when a new ASID is allocated to an mm_struct. However, it is also read without the lock when a task is being scheduled and checking whether or not the current ASID generation is up-to-date. If two threads of the same process are being scheduled in parallel and the bottom bits of the generation in their mm->context.id match the current generation (that is, the mm_struct has not been used for ~2^24 rollovers) then the non-atomic, lockless access to mm->context.id may yield the incorrect ASID. This patch fixes this issue by making mm->context.id and atomic64_t, ensuring that the generation is always read consistently. For code that only requires access to the ASID bits (e.g. TLB flushing by mm), then the value is accessed directly, which GCC converts to an ldrb. Cc: <stable@vger.kernel.org> # 3.8 Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/tlbflush.h')
0 files changed, 0 insertions, 0 deletions