diff options
| author | Mark Rutland <mark.rutland@arm.com> | 2012-11-12 14:49:27 +0000 |
|---|---|---|
| committer | Mark Rutland <mark.rutland@arm.com> | 2013-01-31 15:51:05 +0000 |
| commit | ef01c1d1483d214357f183949bc6173f29906a87 (patch) | |
| tree | 99347e493e16bdcd6a41eaf5f407862c865a3b61 /arch/arm/kernel/arch_timer.c | |
| parent | ef201de430b0deb62a9afd2c4e67f04525cec43c (diff) | |
arm: arch_timer: use u64/u32 for register data
To ensure the correct size of types, use u64 for the return value of
arch_timer_get_cnt{p,v}ct, and u32 for arch_timer_rate, matching the
size of the registers these values are taken from. While we're changing
them anyway, simplify the implementation of arch_timer_get_cnt{p,v}ct.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/kernel/arch_timer.c')
| -rw-r--r-- | arch/arm/kernel/arch_timer.c | 30 |
1 files changed, 11 insertions, 19 deletions
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c index 1bb3b582043..498c29ffbd3 100644 --- a/arch/arm/kernel/arch_timer.c +++ b/arch/arm/kernel/arch_timer.c @@ -25,7 +25,7 @@ #include <asm/arch_timer.h> #include <asm/sched_clock.h> -static unsigned long arch_timer_rate; +static u32 arch_timer_rate; enum ppi_nr { PHYS_SECURE_PPI, @@ -121,27 +121,18 @@ static inline u32 arch_timer_reg_read(const int access, const int reg) return val; } -static inline cycle_t arch_timer_counter_read(const int access) +static inline u64 arch_counter_get_cntpct(void) { - cycle_t cval = 0; - - if (access == ARCH_TIMER_PHYS_ACCESS) - asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval)); - - if (access == ARCH_TIMER_VIRT_ACCESS) - asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (cval)); - + u64 cval; + asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval)); return cval; } -static inline cycle_t arch_counter_get_cntpct(void) -{ - return arch_timer_counter_read(ARCH_TIMER_PHYS_ACCESS); -} - -static inline cycle_t arch_counter_get_cntvct(void) +static inline u64 arch_counter_get_cntvct(void) { - return arch_timer_counter_read(ARCH_TIMER_VIRT_ACCESS); + u64 cval; + asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (cval)); + return cval; } static irqreturn_t inline timer_handler(const int access, @@ -259,7 +250,7 @@ static int __cpuinit arch_timer_setup(struct clock_event_device *clk) static int arch_timer_available(void) { - unsigned long freq; + u32 freq; if (arch_timer_rate == 0) { freq = arch_timer_reg_read(ARCH_TIMER_PHYS_ACCESS, @@ -275,7 +266,8 @@ static int arch_timer_available(void) } pr_info_once("Architected local timer running at %lu.%02luMHz (%s).\n", - arch_timer_rate / 1000000, (arch_timer_rate / 10000) % 100, + (unsigned long)arch_timer_rate / 1000000, + (unsigned long)(arch_timer_rate / 10000) % 100, arch_timer_use_virtual ? "virt" : "phys"); return 0; } |