aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/kernel/entry-armv.S
diff options
context:
space:
mode:
authorRussell King <rmk+kernel@arm.linux.org.uk>2011-06-25 11:44:06 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-07-02 10:56:00 +0100
commit02fe2845d6a837ab02f0738f6cf4591a02cc88d4 (patch)
treee50d06a1ab73a2735dd145edde458463b1da4a37 /arch/arm/kernel/entry-armv.S
parent8b4186160b7894ca4583f702a562856d5d9e9118 (diff)
ARM: entry: avoid enabling interrupts in prefetch/data abort handlers
Avoid enabling interrupts if the parent context had interrupts enabled in the abort handler assembly code, and move this into the breakpoint/ page/alignment fault handlers instead. This gets rid of some special-casing for the breakpoint fault handlers from the low level abort handler path. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/entry-armv.S')
-rw-r--r--arch/arm/kernel/entry-armv.S43
1 files changed, 19 insertions, 24 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index d644d0240ad..c46bafa2f6d 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -185,20 +185,15 @@ ENDPROC(__und_invalid)
__dabt_svc:
svc_entry
- @
- @ get ready to re-enable interrupts if appropriate
- @
- mrs r9, cpsr
- tst r5, #PSR_I_BIT
- biceq r9, r9, #PSR_I_BIT
+#ifdef CONFIG_TRACE_IRQFLAGS
+ bl trace_hardirqs_off
+#endif
dabt_helper
@
- @ set desired IRQ state, then call main handler
+ @ call main handler
@
- debug_entry r1
- msr cpsr_c, r9
mov r2, sp
bl do_DataAbort
@@ -211,6 +206,12 @@ __dabt_svc:
@ restore SPSR and restart the instruction
@
ldr r5, [sp, #S_PSR]
+#ifdef CONFIG_TRACE_IRQFLAGS
+ tst r5, #PSR_I_BIT
+ bleq trace_hardirqs_on
+ tst r5, #PSR_I_BIT
+ blne trace_hardirqs_off
+#endif
svc_exit r5 @ return from exception
UNWIND(.fnend )
ENDPROC(__dabt_svc)
@@ -307,16 +308,11 @@ ENDPROC(__und_svc)
__pabt_svc:
svc_entry
- @
- @ re-enable interrupts if appropriate
- @
- mrs r9, cpsr
- tst r5, #PSR_I_BIT
- biceq r9, r9, #PSR_I_BIT
+#ifdef CONFIG_TRACE_IRQFLAGS
+ bl trace_hardirqs_off
+#endif
pabt_helper
- debug_entry r1
- msr cpsr_c, r9 @ Maybe enable interrupts
mov r2, sp @ regs
bl do_PrefetchAbort @ call abort handler
@@ -329,6 +325,12 @@ __pabt_svc:
@ restore SPSR and restart the instruction
@
ldr r5, [sp, #S_PSR]
+#ifdef CONFIG_TRACE_IRQFLAGS
+ tst r5, #PSR_I_BIT
+ bleq trace_hardirqs_on
+ tst r5, #PSR_I_BIT
+ blne trace_hardirqs_off
+#endif
svc_exit r5 @ return from exception
UNWIND(.fnend )
ENDPROC(__pabt_svc)
@@ -412,11 +414,6 @@ __dabt_usr:
kuser_cmpxchg_check
dabt_helper
- @
- @ IRQs on, then call the main handler
- @
- debug_entry r1
- enable_irq
mov r2, sp
adr lr, BSYM(ret_from_exception)
b do_DataAbort
@@ -663,8 +660,6 @@ ENDPROC(__und_usr_unknown)
__pabt_usr:
usr_entry
pabt_helper
- debug_entry r1
- enable_irq @ Enable interrupts
mov r2, sp @ regs
bl do_PrefetchAbort @ call abort handler
UNWIND(.fnend )