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authorNicolas Ferre <nicolas.ferre@atmel.com>2012-05-10 12:17:41 +0200
committerVinod Koul <vinod.koul@linux.intel.com>2012-05-15 08:47:18 +0530
commit1dd1ea8eb46a71201943148cc0ed3182cd04e288 (patch)
tree0d4c7f05f751d906aea6b0270956453bcd6520e5 /arch/arm/mach-at91/include
parentb409ebfb14a71b64e11b156dc82ede698480397e (diff)
dmaengine: at_hdmac: take maxburst from slave configuration
The maxburst/chunk size was taken from the private slave DMA data structure. Use the common API provided by DMA_SLAVE_CONFIG to setup src/dst maxburst values. The ctrla field is not needed anymore in the slave private structure nor the header constants that were located in an architecture specific directory. The at91sam9g45_devices.c file that was using this platform data is also modified to remove this now useless data. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Diffstat (limited to 'arch/arm/mach-at91/include')
-rw-r--r--arch/arm/mach-at91/include/mach/at_hdmac.h21
1 files changed, 0 insertions, 21 deletions
diff --git a/arch/arm/mach-at91/include/mach/at_hdmac.h b/arch/arm/mach-at91/include/mach/at_hdmac.h
index 810a13e8624..cab0997be3d 100644
--- a/arch/arm/mach-at91/include/mach/at_hdmac.h
+++ b/arch/arm/mach-at91/include/mach/at_hdmac.h
@@ -27,12 +27,10 @@ struct at_dma_platform_data {
* struct at_dma_slave - Controller-specific information about a slave
* @dma_dev: required DMA master device
* @cfg: Platform-specific initializer for the CFG register
- * @ctrla: Platform-specific initializer for the CTRLA register
*/
struct at_dma_slave {
struct device *dma_dev;
u32 cfg;
- u32 ctrla;
};
@@ -59,24 +57,5 @@ struct at_dma_slave {
#define ATC_FIFOCFG_HALFFIFO (0x1 << 28)
#define ATC_FIFOCFG_ENOUGHSPACE (0x2 << 28)
-/* Platform-configurable bits in CTRLA */
-#define ATC_SCSIZE_MASK (0x7 << 16) /* Source Chunk Transfer Size */
-#define ATC_SCSIZE_1 (0x0 << 16)
-#define ATC_SCSIZE_4 (0x1 << 16)
-#define ATC_SCSIZE_8 (0x2 << 16)
-#define ATC_SCSIZE_16 (0x3 << 16)
-#define ATC_SCSIZE_32 (0x4 << 16)
-#define ATC_SCSIZE_64 (0x5 << 16)
-#define ATC_SCSIZE_128 (0x6 << 16)
-#define ATC_SCSIZE_256 (0x7 << 16)
-#define ATC_DCSIZE_MASK (0x7 << 20) /* Destination Chunk Transfer Size */
-#define ATC_DCSIZE_1 (0x0 << 20)
-#define ATC_DCSIZE_4 (0x1 << 20)
-#define ATC_DCSIZE_8 (0x2 << 20)
-#define ATC_DCSIZE_16 (0x3 << 20)
-#define ATC_DCSIZE_32 (0x4 << 20)
-#define ATC_DCSIZE_64 (0x5 << 20)
-#define ATC_DCSIZE_128 (0x6 << 20)
-#define ATC_DCSIZE_256 (0x7 << 20)
#endif /* AT_HDMAC_H */