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authorHartley Sweeten <hartleys@visionengravers.com>2010-02-23 21:20:31 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-02-24 21:08:35 +0000
commitba7c6a3bccd25abd3c19d3655ecb1cc4d258271b (patch)
tree4dde836e8f5ffef24761be08174420c281039073 /arch/arm/mach-ep93xx
parent6bd4b382664d188daed8a48f7df88d188dcd95fa (diff)
ARM: 5953/1: ep93xx: fix broken build of clock.c
Patch 5879/1: ep93xx: define magic numbers for pll1 and pll2 broke the ep93xx build due to one missing rename of EP93XX_SYSCON_CLOCK_SET2. The correct name should be EP93XX_SYSCON_CLKSET2. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ep93xx')
-rw-r--r--arch/arm/mach-ep93xx/clock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 27e33513179..49fa9f8fef4 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -463,7 +463,7 @@ static int __init ep93xx_clock_init(void)
ep93xx_dma_clock_init();
/* Determine the bootloader configured pll2 rate */
- value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2);
+ value = __raw_readl(EP93XX_SYSCON_CLKSET2);
if (!(value & EP93XX_SYSCON_CLKSET2_NBYP2))
clk_pll2.rate = clk_xtali.rate;
else if (value & EP93XX_SYSCON_CLKSET2_PLL2_EN)