mali r4p0: adjust the mali r4p0 config parameters for arndale octa boardlsk-v3.14-lt-mali-r4p0-beta2

4 files changed, 871 insertions, 0 deletions

diff --git a/arch/arm/mach-exynos/include/mach/asv-5250.h b/arch/arm/mach-exynos/include/mach/asv-5250.h
new file mode 100644
index 00000000000..3c57f5e6b9e
--- /dev/null
+++ b/arch/arm/mach-exynos/include/mach/asv-5250.h
@@ -0,0 +1,21 @@
+/* linux/arch/arm/mach-exynos/include/mach/asv-5250.h
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * EXYNOS5 - ASV support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_ASV_H
+#define __ASM_ARCH_ASV_H __FILE__
+
+extern unsigned int exynos_result_of_asv;
+extern unsigned int exynos_result_mif_asv;
+extern bool exynos_lot_id;
+extern bool exynos_lot_is_nzvpu;
+
+#endif /* __ASM_ARCH_ASV_H */
diff --git a/arch/arm/mach-exynos/include/mach/asv-exynos.h b/arch/arm/mach-exynos/include/mach/asv-exynos.h
new file mode 100644
index 00000000000..1084c54b9af
--- /dev/null
+++ b/arch/arm/mach-exynos/include/mach/asv-exynos.h
@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics co., ltd.
+ *		http://www.samsung.com/
+ *
+ * EXYNOS5 - Adaptive Supply Voltage Header File
+ *
+ * this program is free software; you can redistribute it and/or modify
+ * it under the terms of the gnu general public license version 2 as
+ * published by the free software foundation.
+*/
+
+#ifndef __ASM_ARCH_NEW_ASV_H
+#define __ASM_ARCH_NEW_ASV_H
+
+#define ASV_GRP_NR(_id)		_id##_ASV_GRP_NR
+#define DVFS_LEVEL_NR(_id)	_id##_DVFS_LEVEL_NR
+#define MAX_VOLT(_id)		_id##_MAX_VOLT
+#define MAX_VOLT_VER(_id, _ver)	_id##_MAX_VOLT_##_ver
+
+#define ABB_X060		0
+#define ABB_X065		1
+#define ABB_X070		2
+#define ABB_X075		3
+#define ABB_X080		4
+#define ABB_X085		5
+#define ABB_X090		6
+#define ABB_X095		7
+#define ABB_X100		8
+#define ABB_X105		9
+#define ABB_X110		10
+#define ABB_X115		11
+#define ABB_X120		12
+#define ABB_X125		13
+#define ABB_X130		14
+#define ABB_X135		15
+#define ABB_X140		16
+#define ABB_X145		17
+#define ABB_X150		18
+#define ABB_X155		19
+#define ABB_X160		20
+#define ABB_BYPASS		255
+
+#define ABB_INIT		0x80000080
+#define ABB_INIT_BYPASS		0x80000000
+#define LOT_ID_LEN		5
+
+static inline void set_abb(void __iomem *target_reg, unsigned int target_value)
+{
+	unsigned int tmp;
+
+	if (target_value == ABB_BYPASS)
+		tmp = ABB_INIT_BYPASS;
+	else
+		tmp = (ABB_INIT | target_value);
+
+	__raw_writel(tmp , target_reg);
+}
+
+enum asv_type_id {
+	ID_ARM,
+	ID_KFC,
+	ID_INT,
+	ID_MIF,
+	ID_G3D,
+	ID_MIF_SRAM,
+	ID_G3D_SRAM,
+};
+
+/* define Struct for ASV common */
+struct asv_common {
+	char		lot_name[LOT_ID_LEN];
+	unsigned int	ids_value;
+	unsigned int	hpm_value;
+	unsigned int	(*init)(void);
+	unsigned int	(*register_asv_member)(void);
+};
+
+struct asv_freq_table {
+	unsigned int	asv_freq;
+	unsigned int	asv_value;
+};
+
+/* define struct for information of each ASV type */
+struct asv_info {
+	struct list_head	node;
+	enum asv_type_id	asv_type;
+	const char		*name;
+	const struct asv_ops	*ops;
+	unsigned int		asv_group_nr;
+	unsigned int		dvfs_level_nr;
+	unsigned int		result_asv_grp;
+	unsigned int		max_volt_value;
+	struct asv_freq_table	*asv_volt;
+	struct asv_freq_table	*asv_abb;
+	struct abb_common	*abb_info;
+};
+
+/* Struct for ABB function */
+struct abb_common {
+	unsigned int	target_abb;
+	void		(*set_target_abb)(struct asv_info *asv_inform);
+};
+
+/* Operation for ASV*/
+struct asv_ops {
+	unsigned int	(*get_asv_group)(struct asv_common *asv_comm,
+						enum asv_type_id asv_type);
+	unsigned int	(*set_asv_info)(struct asv_info *asv_inform,
+							bool show_value);
+};
+
+/* define function for common asv */
+extern void exynos_add_asv_member(struct asv_info *exynos_asv_info);
+extern struct asv_info *asv_get(enum asv_type_id exynos_asv_type_id);
+extern int exynos_asv_group_get(enum asv_type_id asv_type_id);
+extern unsigned int get_match_volt(enum asv_type_id target_type,
+					unsigned int target_freq);
+extern unsigned int get_match_abb(enum asv_type_id target_type,
+					unsigned int target_freq);
+extern unsigned int set_match_abb(enum asv_type_id target_type,
+					unsigned int target_abb);
+/* define function for initialize of SoC */
+extern int exynos542x_init_asv(struct asv_common *asv_info);
+
+extern bool exynos5420_is_g3d_mp6(void);
+
+#endif /* __ASM_ARCH_NEW_ASV_H */
diff --git a/arch/arm/mach-exynos/include/mach/asv-exynos542x.h b/arch/arm/mach-exynos/include/mach/asv-exynos542x.h
new file mode 100644
index 00000000000..7261e806b9b
--- /dev/null
+++ b/arch/arm/mach-exynos/include/mach/asv-exynos542x.h
@@ -0,0 +1,687 @@
+/*
+ * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * EXYNOS542X - Adaptive Supply Voltage Header file
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_EXYNOS542X_ASV_H
+#define __ASM_ARCH_EXYNOS542X_ASV_H
+
+#include <mach/asv-exynos.h>
+
+#define EXYNOS542X_MAX_ASV_GRP_NR		15
+#define EXYNOS5420_MAX_ASV_GRP_NR		15
+#define EXYNOS5422_MAX_ASV_GRP_NR		14
+
+#define EXYNOS5420_ARM_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5420_arm_asv_volt_info)
+#define EXYNOS5420_ARM_MAX_VOLT			1362500
+
+#define EXYNOS5420_KFC_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5420_kfc_asv_volt_info)
+#define EXYNOS5420_KFC_MAX_VOLT			1312500
+
+#define EXYNOS5420_G3D_MP4_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5420_g3d_mp4_asv_volt_info)
+#define EXYNOS5420_G3D_MP4_MAX_VOLT		1150000
+
+#define EXYNOS5420_G3D_MP6_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5420_g3d_mp6_asv_volt_info)
+#define EXYNOS5420_G3D_MP6_MAX_VOLT		1200000
+
+#define EXYNOS5420_INT_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5420_int_asv_volt_info)
+#define EXYNOS5420_INT_MAX_VOLT			1212500
+
+#define EXYNOS5420_MIF_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5420_mif_asv_volt_info)
+#define EXYNOS5420_MIF_MAX_VOLT			1050000
+
+#define EXYNOS5420_MIF_SRAM_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5420_mif_sram_asv_volt_info)
+#define EXYNOS5420_MIF_SRAM_MAX_VOLT		1050000
+
+#define EXYNOS5420_G3D_MP4_SRAM_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5420_g3d_mp4_sram_asv_volt_info)
+#define EXYNOS5420_G3D_MP4_SRAM_MAX_VOLT	1050000
+
+#define EXYNOS5420_G3D_MP6_SRAM_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5420_g3d_mp6_sram_asv_volt_info)
+#define EXYNOS5420_G3D_MP6_SRAM_MAX_VOLT	1200000
+
+#define EXYNOS5422_ARM_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5422_arm_asv_volt_info)
+#define EXYNOS5422_ARM_MAX_VOLT			1362500
+
+#define EXYNOS5422_KFC_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5422_kfc_asv_volt_info)
+#define EXYNOS5422_KFC_MAX_VOLT			1300000
+
+#define EXYNOS5422_G3D_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5422_g3d_asv_volt_info)
+#define EXYNOS5422_G3D_MAX_VOLT			1025000
+
+#define EXYNOS5422_INT_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5422_int_asv_volt_info)
+#define EXYNOS5422_INT_MAX_VOLT			1025000
+
+#define EXYNOS5422_MIF_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5422_mif_asv_volt_info)
+#define EXYNOS5422_MIF_MAX_VOLT			1000000
+
+#define EXYNOS5422_MIF_SRAM_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5422_mif_sram_asv_volt_info)
+#define EXYNOS5422_MIF_SRAM_MAX_VOLT		1000000
+
+#define EXYNOS5422_G3D_SRAM_DVFS_LEVEL_NR \
+			ARRAY_SIZE(exynos5422_g3d_sram_asv_volt_info)
+#define EXYNOS5422_G3D_SRAM_MAX_VOLT		1025000
+
+static const unsigned int
+exynos5420_refer_table_get_asv[2][EXYNOS542X_MAX_ASV_GRP_NR] = {
+	{ 0, 11, 15, 20, 24, 29, 36, 43, 52, 63, 76, 91, 100, 110, 999 },
+	{ 0, 65, 69, 72, 74, 76, 78, 80, 82, 84, 87, 89,  91,  92, 999 },
+};
+
+static const unsigned int
+exynos5420_refer_use_table_get_asv[2][EXYNOS542X_MAX_ASV_GRP_NR] = {
+	{ 0, 1,  1,  1,  1,  1,  1,  1,  1,  1,   1,  1,   1,   1,  1 },
+	{ 0, 1,  1,  1,  1,  1,  1,  1,  1,  1,   1,  1,   1,   1,  1 },
+};
+
+static const unsigned int
+exynos5420_arm_asv_abb_info[EXYNOS542X_MAX_ASV_GRP_NR] = {
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+};
+
+static const unsigned int
+exynos5420_kfc_asv_abb_info[EXYNOS542X_MAX_ASV_GRP_NR] = {
+	  ABB_X080,   ABB_X080,   ABB_X080,   ABB_X080, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+};
+
+static const unsigned int
+exynos5420_g3d_mp4_asv_abb_info[EXYNOS542X_MAX_ASV_GRP_NR] = {
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+};
+
+static const unsigned int
+exynos5420_g3d_mp6_asv_abb_info[EXYNOS542X_MAX_ASV_GRP_NR] = {
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+};
+
+static const unsigned int
+exynos5420_int_asv_abb_info[EXYNOS542X_MAX_ASV_GRP_NR] = {
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+};
+
+static const unsigned int
+exynos5420_mif_asv_abb_info[EXYNOS542X_MAX_ASV_GRP_NR] = {
+	  ABB_X130,   ABB_X130,   ABB_X130,   ABB_X130,   ABB_X130,
+	  ABB_X130,   ABB_X130,   ABB_X130,   ABB_X130,   ABB_X130,
+	  ABB_X130,   ABB_X130,   ABB_X130,   ABB_X130,   ABB_X130,
+};
+
+static const unsigned int exynos5420_arm_asv_volt_info
+[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{ 2000000,
+		1362500, 1350000, 1337500, 1325000, 1312500,
+		1325000, 1312500, 1300000, 1287500, 1262500,
+		1237500, 1237500, 1225000, 1212500, 1200000 },
+	{ 1900000,
+		1300000, 1287500, 1262500, 1237500, 1225000,
+		1212500, 1200000, 1187500, 1175000, 1162500,
+		1150000, 1137500, 1125000, 1112500, 1112500 },
+	{ 1800000,
+		1250000, 1250000, 1225000, 1212500, 1200000,
+		1187500, 1175000, 1162500, 1150000, 1137500,
+		1125000, 1112500, 1100000, 1087500, 1087500 },
+	{ 1700000,
+		1212500, 1212500, 1187500, 1175000, 1162500,
+		1150000, 1137500, 1125000, 1112500, 1100000,
+		1087500, 1075000, 1062500, 1050000, 1050000 },
+	{ 1600000,
+		1175000, 1175000, 1150000, 1137500, 1125000,
+		1112500, 1100000, 1087500, 1075000, 1062500,
+		1050000, 1037500, 1025000, 1012500, 1012500 },
+	{ 1500000,
+		1137500, 1137500, 1112500, 1100000, 1087500,
+		1075000, 1062500, 1050000, 1037500, 1025000,
+		1012500, 1000000,  987500,  975000,  975000 },
+	{ 1400000,
+		1112500, 1112500, 1087500, 1075000, 1062500,
+		1050000, 1037500, 1025000, 1012500, 1000000,
+		 987500,  975000,  962500,  950000,  950000 },
+	{ 1300000,
+		1062500, 1062500, 1037500, 1025000, 1012500,
+		1000000,  987500,  975000,  962500,  950000,
+		 937500,  925000,  912500,  900000,  900000 },
+	{ 1200000,
+		1037500, 1037500, 1012500, 1000000,  987500,
+		 975000,  962500,  950000,  937500,  925000,
+		 912500,  900000,  900000,  900000,  900000 },
+	{ 1100000,
+		1012500, 1012500,  987500,  975000,  962500,
+		 950000,  937500,  925000,  912500,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+	{ 1000000,
+		 987500,  987500,  962500,  950000,  937500,
+		 925000,  912500,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+	{  900000,
+		 962500,  962500,  937500,  925000,  912500,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+	{  800000,
+		 937500,  937500,  912500,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+	{  700000,
+		 912500,  912500,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+	{  600000,
+		 912500,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+	{  500000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+	{  400000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+	{  300000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+	{  200000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+};
+
+static const unsigned int exynos5420_kfc_asv_volt_info
+[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{ 1300000,
+		1275000, 1262500, 1250000, 1237500, 1237500,
+		1225000, 1212500, 1200000, 1187500, 1175000,
+		1162500, 1150000, 1137500, 1125000, 1125000 },
+	{ 1200000,
+		1212500, 1200000, 1187500, 1175000, 1175000,
+		1162500, 1150000, 1137500, 1125000, 1112500,
+		1100000, 1087500, 1075000, 1075000, 1075000 },
+	{ 1100000,
+		1162500, 1150000, 1137500, 1125000, 1125000,
+		1112500, 1100000, 1087500, 1075000, 1062500,
+		1050000, 1037500, 1025000, 1025000, 1025000 },
+	{ 1000000,
+		1112500, 1100000, 1087500, 1075000, 1075000,
+		1062500, 1050000, 1037500, 1025000, 1012500,
+		1000000,  987500,  975000,  975000,  975000 },
+	{  900000,
+		1062500, 1050000, 1037500, 1025000, 1025000,
+		1012500, 1000000,  987500,  975000,  962500,
+		 950000,  937500,  925000,  925000,  925000 },
+	{  800000,
+		1025000, 1012500, 1000000,  987500,  987500,
+		 975000,  962500,  950000,  937500,  925000,
+		 912500,  912500,  912500,  912500,  912500 },
+	{  700000,
+		 975000,  962500,  950000,  937500,  937500,
+		 925000,  912500,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+	{  600000,
+		 937500,  925000,  912500,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+	{  500000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+	{  400000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+	{  300000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+	{  200000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+};
+
+static const unsigned int exynos5420_g3d_mp4_asv_volt_info
+[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{ 600000,
+		1025000, 1012500, 1000000,  987500,  975000,
+		 962500,  950000,  937500,  925000,  912500,
+		 900000,  887500,  875000,  862500,  850000 },
+	{ 533000,
+		 987500,  975000,  962500,  950000,  937500,
+		 925000,  912500,  900000,  887500,  875000,
+		 862500,  850000,  837500,  825000,  825000 },
+	{ 480000,
+		 950000,  937500,  925000,  912500,  900000,
+		 887500,  875000,  862500,  850000,  837500,
+		 825000,  812500,  812500,  812500,  812500 },
+	{ 420000,
+		 937500,  925000,  912500,  900000,  887500,
+		 875000,  862500,  850000,  837500,  825000,
+		 812500,  800000,  800000,  800000,  800000 },
+	{ 350000,
+		 900000,  887500,  875000,  862500,  850000,
+		 837500,  825000,  812500,  800000,  800000,
+		 800000,  800000,  800000,  800000,  800000 },
+	{ 266000,
+		 862500,  850000,  837500,  825000,  825000,
+		 812500,  800000,  800000,  800000,  800000,
+		 800000,  800000,  800000,  800000,  800000 },
+	{ 177000,
+		 862500,  850000,  837500,  825000,  825000,
+		 812500,  800000,  800000,  800000,  800000,
+		 800000,  800000,  800000,  800000,  800000 },
+	{ 100000,
+		 862500,  850000,  837500,  825000,  825000,
+		 812500,  800000,  800000,  800000,  800000,
+		 800000,  800000,  800000,  800000,  800000 },
+};
+
+static const unsigned int exynos5420_g3d_mp6_asv_volt_info
+[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{ 533000,
+		1062500, 1050000, 1037500, 1025000, 1012500,
+		1000000,  987500,  975000,  962500,  950000,
+		 937500,  925000,  912500,  900000,  900000 },
+	{ 480000,
+		1025000, 1012500, 1000000,  987500,  975000,
+		 962500,  950000,  937500,  925000,  912500,
+		 900000,  887500,  875000,  862500,  862500 },
+	{ 420000,
+		 987500,  975000,  962500,  950000,  937500,
+		 925000,  912500,  900000,  887500,  875000,
+		 862500,  850000,  837500,  825000,  825000 },
+	{ 350000,
+		 937500,  925000,  912500,  900000,  887500,
+		 875000,  862500,  850000,  837500,  825000,
+		 812500,  800000,  800000,  800000,  800000 },
+	{ 266000,
+		 887500,  875000,  862500,  850000,  837500,
+		 825000,  812500,  800000,  800000,  800000,
+		 800000,  800000,  800000,  800000,  800000 },
+	{ 177000,
+		 850000,  837500,  825000,  812500,  800000,
+		 800000,  800000,  800000,  800000,  800000,
+		 800000,  800000,  800000,  800000,  800000 },
+	{ 100000,
+		 850000,  837500,  825000,  812500,  800000,
+		 800000,  800000,  800000,  800000,  800000,
+		 800000,  800000,  800000,  800000,  800000 },
+};
+
+static const unsigned int exynos5420_int_asv_volt_info
+[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{ 600000,
+		1025000, 1012500, 1000000,  987500,  975000,
+		 962500,  950000,  962500,  950000,  937500,
+		 925000,  912500,  900000,  900000,  900000 },
+	{ 500000,
+		 962500,  950000,  937500,  925000,  912500,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000 },
+	{ 400000,
+		 950000,  937500,  925000,  912500,  912500,
+		 912500,  912500,  912500,  900000,  887500,
+		 875000,  862500,  862500,  862500,  862500 },
+	{ 333000,
+		 912500,  912500,  900000,  900000,  900000,
+		 900000,  900000,  900000,  887500,  875000,
+		 862500,  850000,  850000,  850000,  850000 },
+	{ 222000,
+		 912500,  912500,  900000,  900000,  900000,
+		 900000,  900000,  900000,  887500,  875000,
+		 862500,  850000,  850000,  850000,  850000 },
+	{ 111000,
+		 912500,  912500,  900000,  900000,  900000,
+		 900000,  900000,  900000,  887500,  875000,
+		 862500,  850000,  850000,  850000,  850000 },
+	{  83000,
+		 912500,  912500,  900000,  900000,  900000,
+		 900000,  900000,  900000,  887500,  875000,
+		 862500,  850000,  850000,  850000,  850000 },
+};
+
+static const unsigned int
+exynos5420_mif_asv_volt_info[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{      0,
+		1000000, 1000000, 1000000, 1000000,  1000000,
+		1000000, 1000000, 1000000, 1000000,  1000000,
+		1000000, 1000000, 1000000, 1000000,  1000000 },
+};
+
+static const unsigned int
+exynos5420_mif_sram_asv_volt_info[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{      0,
+		1000000, 1000000, 1000000, 1000000, 1000000,
+		1000000, 1000000, 1000000, 1000000, 1000000,
+		1000000, 1000000, 1000000, 1000000, 1000000 },
+};
+
+static const unsigned int
+exynos5420_g3d_mp4_sram_asv_volt_info[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{      0,
+		1025000, 1025000, 1000000, 1000000,  975000,
+		 975000,  950000,  950000,  925000,  925000,
+		 900000,  900000,  900000,  900000,  900000 },
+};
+
+static const unsigned int
+exynos5420_g3d_mp6_sram_asv_volt_info[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{      0,
+		1075000, 1050000, 1050000, 1025000, 1025000,
+		1000000, 1000000,  975000,  975000,  950000,
+		 950000,  925000,  925000,  900000,  900000 },
+};
+
+static const unsigned int
+exynos5422_refer_table_get_asv[2][EXYNOS542X_MAX_ASV_GRP_NR] = {
+	{ 13, 21, 25, 30, 36, 43, 51, 65, 81, 98, 119, 135, 150, 999},
+	{ 55, 65, 69, 72, 74, 76, 78, 80, 82, 84, 87, 89, 92, 999},
+};
+
+static const unsigned int
+exynos5422_refer_use_table_get_asv[2][EXYNOS542X_MAX_ASV_GRP_NR] = {
+	{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1},
+	{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1},
+};
+
+static const unsigned int
+exynos5422_arm_asv_abb_info[EXYNOS542X_MAX_ASV_GRP_NR] = {
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+};
+
+static const unsigned int
+exynos5422_int_asv_abb_info[EXYNOS542X_MAX_ASV_GRP_NR] = {
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,   ABB_X130,
+	  ABB_X130,   ABB_X130,   ABB_X130,   ABB_X130,
+};
+
+static const unsigned int
+exynos5422_mif_asv_abb_info[EXYNOS542X_MAX_ASV_GRP_NR] = {
+	  ABB_X130,   ABB_X130,   ABB_X130,   ABB_X130,   ABB_X130,
+	  ABB_X130,   ABB_X130,   ABB_X130,   ABB_X130,   ABB_X130,
+	  ABB_X130,   ABB_X130,   ABB_X130,   ABB_X130,
+};
+
+static const unsigned int
+exynos5422_g3d_asv_abb_info[EXYNOS542X_MAX_ASV_GRP_NR] = {
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+};
+
+static const unsigned int
+exynos5422_kfc_asv_abb_info[EXYNOS542X_MAX_ASV_GRP_NR] = {
+	  ABB_X070,   ABB_X070,   ABB_X070,   ABB_X080,   ABB_X080,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+	ABB_BYPASS, ABB_BYPASS, ABB_BYPASS, ABB_BYPASS,
+};
+
+static const unsigned int exynos5422_arm_asv_volt_info
+[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{ 2100000,
+		1350000, 1350000, 1350000, 1350000, 1350000,
+		1337500, 1325000, 1312500, 1300000, 1287500,
+		1275000, 1262500, 1250000, 1237500 },
+	{ 2000000,
+		1312500, 1312500, 1312500, 1300000, 1287500,
+		1275000, 1262500, 1250000, 1237500, 1225000,
+		1212500, 1200000, 1187500, 1175000 },
+	{ 1900000,
+		1275000, 1262500, 1250000, 1237500, 1225000,
+		1212500, 1200000, 1187500, 1175000, 1162500,
+		1150000, 1137500, 1125000, 1112500 },
+	{ 1800000,
+		1225000, 1212500, 1200000, 1187500, 1175000,
+		1162500, 1150000, 1137500, 1125000, 1112500,
+		1100000, 1087500, 1075000, 1062500 },
+	{ 1700000,
+		1187500, 1175000, 1162500, 1150000, 1137500,
+		1125000, 1112500, 1100000, 1087500, 1075000,
+		1062500, 1050000, 1037500, 1025000 },
+	{ 1600000,
+		1150000, 1137500, 1125000, 1112500, 1100000,
+		1087500, 1075000, 1062500, 1050000, 1037500,
+		1025000, 1012500, 1000000,  987500 },
+	{ 1500000,
+		1112500, 1100000, 1087500, 1075000, 1062500,
+		1050000, 1037500, 1025000, 1012500, 1000000,
+		 987500,  975000,  962500,  950000 },
+	{ 1400000,
+		1087500, 1075000, 1062500, 1050000, 1037500,
+		1025000, 1012500, 1000000,  987500,  975000,
+		 962500,  950000,  937500,  925000 },
+	{ 1300000,
+		1062500, 1050000, 1037500, 1025000, 1012500,
+		1000000,  987500,  975000,  962500,  950000,
+		 937500,  925000,  912500,  900000 },
+	{ 1200000,
+		1037500, 1025000, 1012500, 1000000,  987500,
+		 975000,  962500,  950000,  937500,  925000,
+		 912500,  900000,  900000,  900000 },
+	{ 1100000,
+		1012500, 1000000,  987500,  975000,  962500,
+		 950000,  937500,  925000,  912500,  900000,
+		 900000,  900000,  900000,  900000 },
+	{ 1000000,
+		 987500,  975000,  962500,  950000,  937500,
+		 925000,  912500,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000 },
+	{ 900000,
+		 962500,  950000,  937500,  925000,  912500,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000 },
+	{ 800000,
+		 937500,  925000,  912500,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000 },
+	{ 700000,
+		 912500,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000 },
+	{ 600000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000 },
+	{ 500000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000 },
+	{ 400000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000 },
+	{ 300000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000 },
+	{ 200000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000 },
+};
+
+static const unsigned int exynos5422_kfc_asv_volt_info
+[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{ 1500000,
+		1300000, 1300000, 1300000, 1300000, 1300000,
+		1300000, 1287500, 1275000, 1262500, 1250000,
+		1237500, 1222500, 1212500, 1200000 },
+	{ 1400000,
+		1287500, 1275000, 1262500, 1250000, 1237500,
+		1225000, 1212500, 1200000, 1187500, 1175000,
+		1162500, 1150000, 1137500, 1125000 },
+	{ 1300000,
+		1237500, 1225000, 1212500, 1200000, 1187500,
+		1175000, 1162500, 1150000, 1137500, 1125000,
+		1112500, 1100000, 1087500, 1075000 },
+	{ 1200000,
+		1187500, 1175000, 1162500, 1150000, 1137500,
+		1125000, 1112500, 1100000, 1087500, 1075000,
+		1062500, 1050000, 1037500, 1025000 },
+	{ 1100000,
+		1150000, 1137500, 1125000, 1112500, 1100000,
+		1087500, 1075000, 1062500, 1050000, 1037500,
+		1025000, 1012500, 1000000,  987500 },
+	{ 1000000,
+		1112500, 1100000, 1087500, 1075000, 1062500,
+		1050000, 1037500, 1025000, 1012500, 1000000,
+		 987500,  975000,  962500,  950000 },
+	{ 900000,
+		1075000, 1062500, 1050000, 1037500, 1025000,
+		1012500, 1000000,  987500,  975000,  962500,
+		 950000,  937500,  925000,  912500 },
+	{ 800000,
+		1037500, 1025000, 1012500, 1000000,  987500,
+		 975000,  962500,  950000,  937500,  925000,
+		 912500,  900000,  900000,  900000 },
+	{ 700000,
+		1000000,  987500,  975000,  962500,  950000,
+		 937500,  925000,  912500,  900000,  900000,
+		 900000,  900000,  900000,  900000 },
+	{ 600000,
+		 962500,  950000,  937500,  925000,  912500,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000 },
+	{ 500000,
+		 925000,  912500,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000 },
+	{ 400000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000 },
+	{ 300000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000 },
+	{ 200000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000,  900000,
+		 900000,  900000,  900000,  900000 },
+};
+
+/*
+ * DVFS V2.40 table for 5422 supports INT levels upto 420MHz. The 500MHz
+ * level has the 420MHz INT bus level voltages and will stay disabled till
+ * we enabled 2.1GHz support which requires a locking to the 420MHz level.
+ */
+static const unsigned int exynos5422_int_asv_volt_info
+[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{ 600000,
+		      0,       0,       0,       0,       0,
+		      0,       0,       0,       0,       0,
+		      0,       0,       0,       0 },
+	{ 500000,
+		 1075000, 1062500, 1050000, 1037500, 1025000,
+		 1012500, 1000000,  987500,  975000,  987500,
+		  975000,  962500,  950000,  937500 },
+	{ 400000,
+		 962500,  950000,  937500,  925000,  912500,
+		 900000,  887500,  887500,  887500,  875000,
+		 887500,  875000,  862500,  850000 },
+	{ 333000,
+		 925000,  912500,  900000,  887500,  875000,
+		 862500,  850000,  850000,  850000,  850000,
+		 850000,  850000,  850000,  850000 },
+	{ 222000,
+		 900000,  887500,  875000,  862500,  850000,
+		 850000,  850000,  850000,  850000,  850000,
+		 850000,  850000,  850000,  850000 },
+	{ 111000,
+		 900000,  887500,  875000,  862500,  850000,
+		 850000,  850000,  850000,  850000,  850000,
+		 850000,  850000,  850000,  850000 },
+	{ 83000,
+		 850000,  850000,  850000,  850000,  850000,
+		 850000,  850000,  850000,  850000,  850000,
+		 850000,  850000,  850000,  850000 },
+};
+
+static const unsigned int exynos5422_mif_asv_volt_info
+[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{ 0,
+		1000000, 1000000, 1000000, 1000000, 1000000,
+		1000000, 1000000, 1000000, 1000000, 1000000,
+		1000000, 1000000, 1000000, 1000000 },
+};
+
+static const unsigned int exynos5422_g3d_asv_volt_info
+[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{ 543000,
+		1025000, 1012500, 1000000,  987500,  975000,
+		 962500,  950000,  937500,  925000,  912500,
+		 900000,  887500,  875000,  862500 },
+	{ 480000,
+		 975000,  962500,  950000,  937500,  925000,
+		 912500,  900000,  887500,  875000,  862500,
+		 850000,  837500,  825000,  812500 },
+	{ 420000,
+		 937500,  925000,  912500,  900000,  887500,
+		 875000,  862500,  850000,  837500,  825000,
+		 812500,  800000,  787500, 775000 },
+	{ 350000,
+		 912500,  900000,  887500,  875000,  862500,
+		 850000,  837500,  825000,  812500,  800000,
+		 787500,  775000,  775000,  775000 },
+	{ 266000,
+		 887500,  875000,  862500,  850000,  837500,
+		 825000,  812500,  800000,  787500,  775000,
+		 775000,  775000,  775000,  775000 },
+	{ 177000,
+		 825000,  812500,  800000,  787500,  775000,
+		 775000,  775000,  775000,  775000,  775000,
+		 775000,  775000,  775000,  775000 },
+	{ 100000,
+		 825000,  812500,  800000,  787500,  775000,
+		 775000,  775000,  775000,  775000,  775000,
+		 775000,  775000,  775000,  775000 },
+};
+
+static const unsigned int
+exynos5422_mif_sram_asv_volt_info[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{ 0,
+		1000000, 1000000, 1000000, 1000000, 1000000,
+		1000000, 1000000, 1000000, 1000000, 1000000,
+		1000000, 1000000, 1000000, 1000000 },
+};
+
+static const unsigned int
+exynos5422_g3d_sram_asv_volt_info[][EXYNOS542X_MAX_ASV_GRP_NR + 1] = {
+	{ 0,
+		1025000, 1025000, 1000000, 1000000,  975000,
+		 975000,  950000,  950000,  925000,  925000,
+		 900000,  900000,  900000,  900000 },
+};
+
+#endif /* EXYNOS542X_ASV_H */
diff --git a/arch/arm/mach-exynos/include/mach/pmu.h b/arch/arm/mach-exynos/include/mach/pmu.h
new file mode 100644
index 00000000000..b2ecd902f61
--- /dev/null
+++ b/arch/arm/mach-exynos/include/mach/pmu.h
@@ -0,0 +1,36 @@
+/* linux/arch/arm/mach-exynos4/include/mach/pmu.h
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com/
+ *
+ * EXYNOS4210 - PMU(Power Management Unit) support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_PMU_H
+#define __ASM_ARCH_PMU_H __FILE__
+
+#define PMU_TABLE_END	NULL
+
+enum sys_powerdown {
+	SYS_AFTR,
+	SYS_LPA,
+	SYS_SLEEP,
+	NUM_SYS_POWERDOWN,
+};
+
+extern unsigned long l2x0_regs_phys;
+struct exynos_pmu_conf {
+	void __iomem *reg;
+	unsigned int val[NUM_SYS_POWERDOWN];
+};
+
+extern unsigned long s5p_resume_cpu_id;
+
+extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
+extern void s3c_cpu_resume(void);
+
+#endif /* __ASM_ARCH_PMU_H */