diff options
| author | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2013-02-15 14:00:15 +0100 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2013-02-15 14:00:15 +0100 |
| commit | 60a406d1de227037193db6790a1a8650ea51dc93 (patch) | |
| tree | 3ad0b8e66844ec90e6d0118f496e407f9761bc29 /arch/arm/mach-exynos | |
| parent | 4419fbd4b408c3a8634b3a8dd952055d0f0b601f (diff) | |
| parent | c098ea74b268969bde5aaf1689b61d236abf82f5 (diff) | |
Merge branch 'next/cpufreq-exynos' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung
* 'next/cpufreq-exynos' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
cpufreq: exynos: Fix hang in pm handler due to frequency mismatch
cpufreq: exynos: Initialize return variable
cpufreq: exynos: Fix unsigned variable being checked for negative value
cpufreq: exynos: Get booting freq value in exynos_cpufreq_init
cpufreq: exynos: Show list of available frequencies
cpufreq: exynos: Add missing static
cpufreq: exynos: Split exynos_target function into two functions
cpufreq: exynos: Use APLL_FREQ macro for cpu divider value
cpufreq: exynos: Check old & new frequency early
cpufreq: exynos: Remove unused variable & IS_ERR
Diffstat (limited to 'arch/arm/mach-exynos')
| -rw-r--r-- | arch/arm/mach-exynos/include/mach/cpufreq.h | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/arch/arm/mach-exynos/include/mach/cpufreq.h b/arch/arm/mach-exynos/include/mach/cpufreq.h index 7517c3f417a..b5d39dd03b2 100644 --- a/arch/arm/mach-exynos/include/mach/cpufreq.h +++ b/arch/arm/mach-exynos/include/mach/cpufreq.h @@ -18,12 +18,25 @@ enum cpufreq_level_index { L20, }; +#define APLL_FREQ(f, a0, a1, a2, a3, a4, a5, a6, a7, b0, b1, b2, m, p, s) \ + { \ + .freq = (f) * 1000, \ + .clk_div_cpu0 = ((a0) | (a1) << 4 | (a2) << 8 | (a3) << 12 | \ + (a4) << 16 | (a5) << 20 | (a6) << 24 | (a7) << 28), \ + .clk_div_cpu1 = (b0 << 0 | b1 << 4 | b2 << 8), \ + .mps = ((m) << 16 | (p) << 8 | (s)), \ + } + +struct apll_freq { + unsigned int freq; + u32 clk_div_cpu0; + u32 clk_div_cpu1; + u32 mps; +}; + struct exynos_dvfs_info { unsigned long mpll_freq_khz; unsigned int pll_safe_idx; - unsigned int pm_lock_idx; - unsigned int max_support_idx; - unsigned int min_support_idx; struct clk *cpu_clk; unsigned int *volt_table; struct cpufreq_frequency_table *freq_table; |