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authorMadhusudhan Chikkature <madhu.cr@ti.com>2010-10-01 16:35:25 -0700
committerTony Lindgren <tony@atomide.com>2010-10-01 16:35:25 -0700
commit07ad64b60c4d1f2bdbefa5db29ccb235596bc670 (patch)
tree572c8e17d988c3fb655c9e82804bb733959f224f /arch/arm/mach-omap2/hsmmc.c
parente13bb34bd9bbc01dcab9ed1b8adaa6a199ce059c (diff)
OMAP4 ES2: HSMMC soft reset change
The omap4 es2 hsmmc has a updated soft reset logic.After the reset is issued monitor a 0->1 transition first. The reset of CMD or DATA lines is complete only after a 0->1->0 transition of SRC or SRD bits. Signed-off-by: Madhusudhan Chikkature <madhu.cr@ti.com> Tested-by: Anand Gadiyar <gadiyar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/hsmmc.c')
-rw-r--r--arch/arm/mach-omap2/hsmmc.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index eb92b8107d2..df1311d93eb 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -303,6 +303,9 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
else
mmc->slots[0].features |= HSMMC_HAS_PBIAS;
+ if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0))
+ mmc->slots[0].features |= HSMMC_HAS_UPDATED_RESET;
+
switch (c->mmc) {
case 1:
if (mmc->slots[0].features & HSMMC_HAS_PBIAS) {