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authorMagnus Damm <damm@opensource.se>2012-03-28 19:22:54 +0900
committerRafael J. Wysocki <rjw@sisk.pl>2012-04-11 12:11:49 +0200
commit1ee8299a9ec1ce5137a044c7768293007b9a3267 (patch)
tree91cbe44c81c1817f5546bd1ee4ed689db9e12404 /arch/arm/mach-shmobile/include/mach/irqs.h
parentd7e7e4ffc64f700e876a9f3b2727febaa2041221 (diff)
ARM: mach-shmobile: Use 0x3400 as INTCS vector offset
Update mach-shmobile to use 0x3400 as INTCS_VECT_BASE. Since the ARM architecture a little while back added support for 10 bit irqs we can now undo the previously merged commit 9b7c23adb350a108737a993c9c781463c1439dc6 and use 0x3400 as INTCS vector base. This change is necessary to avoid overlapping of interrupt ranges so separate IRQ domains can be used for different INTC instances. Without this fix the vectors used by various INTC instances are overlapping on for instance sh7372 which works at the moment but breaks upcoming IRQ domain support. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Diffstat (limited to 'arch/arm/mach-shmobile/include/mach/irqs.h')
-rw-r--r--arch/arm/mach-shmobile/include/mach/irqs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h
index 4e686cc201f..06a5da3c305 100644
--- a/arch/arm/mach-shmobile/include/mach/irqs.h
+++ b/arch/arm/mach-shmobile/include/mach/irqs.h
@@ -7,7 +7,7 @@
#define gic_spi(nr) ((nr) + 32)
/* INTCS */
-#define INTCS_VECT_BASE 0x2200
+#define INTCS_VECT_BASE 0x3400
#define INTCS_VECT(n, vect) INTC_VECT((n), INTCS_VECT_BASE + (vect))
#define intcs_evt2irq(evt) evt2irq(INTCS_VECT_BASE + (evt))