Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "We have a fairly large batch of fixes this time around, mostly just
  due to various platforms all having a fix or two more than usual.

  Worth pointing out are:

   - A fix for EDMA on Davinci/OMAP where channel allocation broke with
     the DT conversion.  Due to some miscommunication we didn't
     understand the impact of the breakage, so we were pushing back on
     it for 3.12, but it sounds like it's actually breaking quite a few
     people out there.

   - A bunch of fixes for Marvell platforms, some straggling fixes for
     merge window fallout and some fixes for a couple of the platforms
     (Netgear RN102 in particular).

   - A fix for a race between multi-cluster power management and cpu
     hotplug on Versatile Express.

  And a bunch of other smaller fixes that all add up.

  We'll be switching over into stricter regressions-only mode from here
  on out"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits)
  ARM: multi_v7_defconfig: add SDHCI for i.MX
  bus: mvebu-mbus: Fix optional pcie-mem/io-aperture properties
  ARM: mvebu: add missing DT Mbus ranges and relocate PCIe DT nodes for RN102
  ARM: at91: sam9g45: shutdown ddr1 too when rebooting
  MAINTAINERS: ARM: SIRF: use kernel.org mail box
  MAINTAINERS: ARM: SIRF: add missed drivers into maintain list
  ARM: edma: Fix clearing of unused list for DT DMA resources
  ARM: vexpress: tc2: fix hotplug/idle/kexec race on cluster power down
  ARM: dts: sirf: fix interrupt and dma prop of VIP for prima2 and atlas6
  ARM: dts: sirf: fix the ranges of peri-iobrg of prima2
  ARM: dts: makefile: build atlas6-evb.dtb for ARCH_ATLAS6
  ARM: dts: sirf: fix fifosize, clks, dma channels for UART
  ARM: mvebu: Add DT entry for ReadyNAS 102 to use gpio-poweroff driver
  ARM: mvebu: fix ReadyNAS 102 Power button GPIO to make it active high
  ARM: mach-integrator: Add stub for pci_v3_early_init() for !CONFIG_PCI
  ARM: shmobile: Remove #gpio-ranges-cells DT property
  gpio: rcar: Remove #gpio-range-cells DT property usage
  ARM: shmobile: armadillo: fixup ether pinctrl naming
  ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup
  ARM: shmobile: update SDHI DT compatibility string to the <unit>-<soc> format
  ...

2 files changed, 28 insertions, 3 deletions

diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 5bd1479d3de..7f8f6076d36 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -1108,9 +1108,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
 	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-r8a7740",
 				  "fsib_mclk_in", "fsib"),
 	/* GETHER */
-	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740",
 				  "gether_mii", "gether"),
-	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740",
 				  "gether_int", "gether"),
 	/* HDMI */
 	PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-r8a7740",
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index ffb6f0ac760..5930af8d434 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -29,6 +29,7 @@
 #include <linux/pinctrl/machine.h>
 #include <linux/platform_data/gpio-rcar.h>
 #include <linux/platform_device.h>
+#include <linux/phy.h>
 #include <linux/regulator/fixed.h>
 #include <linux/regulator/machine.h>
 #include <linux/sh_eth.h>
@@ -155,6 +156,30 @@ static void __init lager_add_standard_devices(void)
 					  &ether_pdata, sizeof(ether_pdata));
 }
 
+/*
+ * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
+ * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
+ * 14-15. We have to set them back to 01 from the default 00 value each time
+ * the PHY is reset. It's also important because the PHY's LED0 signal is
+ * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
+ * bounce on and off after each packet, which we apparently want to avoid.
+ */
+static int lager_ksz8041_fixup(struct phy_device *phydev)
+{
+	u16 phyctrl1 = phy_read(phydev, 0x1e);
+
+	phyctrl1 &= ~0xc000;
+	phyctrl1 |= 0x4000;
+	return phy_write(phydev, 0x1e, phyctrl1);
+}
+
+static void __init lager_init(void)
+{
+	lager_add_standard_devices();
+
+	phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
+}
+
 static const char *lager_boards_compat_dt[] __initdata = {
 	"renesas,lager",
 	NULL,
@@ -163,6 +188,6 @@ static const char *lager_boards_compat_dt[] __initdata = {
 DT_MACHINE_START(LAGER_DT, "lager")
 	.init_early	= r8a7790_init_delay,
 	.init_time	= r8a7790_timer_init,
-	.init_machine	= lager_add_standard_devices,
+	.init_machine	= lager_init,
 	.dt_compat	= lager_boards_compat_dt,
 MACHINE_END