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authorPeter De Schrijver <pdeschrijver@nvidia.com>2012-02-10 01:47:49 +0200
committerOlof Johansson <olof@lixom.net>2012-02-26 14:44:45 -0800
commit65fe31da5cede3597938b0f3bba99f604369018d (patch)
treec5a8545f4dcf1f19a4ef0edcf637feb6338d5f6f /arch/arm/mach-tegra/powergate.c
parent6cafa97d3ca6a480dc39e20bb2d12ec2c5ca025e (diff)
ARM: tegra: support for Tegra30 CPU powerdomains
Secondary CPU powerdomains can be powergated on Tegra30. Add the necessary functions to do this. This will be used to boot the secondary CPUs later on. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-tegra/powergate.c')
-rw-r--r--arch/arm/mach-tegra/powergate.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index 7120ad7e135..c238699ae86 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -41,6 +41,14 @@
#define PWRGATE_STATUS 0x38
static int tegra_num_powerdomains;
+static int tegra_num_cpu_domains;
+static u8 *tegra_cpu_domains;
+static u8 tegra30_cpu_domains[] = {
+ TEGRA_POWERGATE_CPU0,
+ TEGRA_POWERGATE_CPU1,
+ TEGRA_POWERGATE_CPU2,
+ TEGRA_POWERGATE_CPU3,
+};
static DEFINE_SPINLOCK(tegra_powergate_lock);
@@ -161,6 +169,14 @@ err_power:
return ret;
}
+int tegra_cpu_powergate_id(int cpuid)
+{
+ if (cpuid > 0 && cpuid < tegra_num_cpu_domains)
+ return tegra_cpu_domains[cpuid];
+
+ return -EINVAL;
+}
+
int __init tegra_powergate_init(void)
{
switch (tegra_chip_id) {
@@ -169,6 +185,8 @@ int __init tegra_powergate_init(void)
break;
case TEGRA30:
tegra_num_powerdomains = 14;
+ tegra_num_cpu_domains = 4;
+ tegra_cpu_domains = tegra30_cpu_domains;
break;
default:
/* Unknown Tegra variant. Disable powergating */
@@ -178,7 +196,6 @@ int __init tegra_powergate_init(void)
return 0;
}
-arch_initcall(tegra_powergate_init);
#ifdef CONFIG_DEBUG_FS