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authorGreg Ungerer <gerg@uclinux.org>2011-12-24 12:32:52 +1000
committerGreg Ungerer <gerg@uclinux.org>2012-03-05 09:43:09 +1000
commita4e2e2ac08f73dedeabecb9e1141a05889591b7b (patch)
tree649af490d48b9cc406e5c5709717add5ee6e2697 /arch/m68k/include/asm/mcfqspi.h
parentb7ce7f0d0efc1a95154fa6872d5d7c970d281c71 (diff)
m68knommu: make 520x QSPI platform addressing consistent
If we make all QSPI (SPI protocol) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and code and use a single setup for all. So modify the ColdFire 520x QSPI addressing so that: . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used . move chip select definitions (CS) to appropriate header Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/mcfqspi.h')
-rw-r--r--arch/m68k/include/asm/mcfqspi.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/m68k/include/asm/mcfqspi.h b/arch/m68k/include/asm/mcfqspi.h
index 7fe631972f1..34a531ed2bd 100644
--- a/arch/m68k/include/asm/mcfqspi.h
+++ b/arch/m68k/include/asm/mcfqspi.h
@@ -25,8 +25,6 @@
#define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340)
#elif defined(CONFIG_M5249)
#define MCFQSPI_IOBASE (MCF_MBAR + 0x300)
-#elif defined(CONFIG_M520x)
-#define MCFQSPI_IOBASE 0xFC05C000
#elif defined(CONFIG_M532x)
#define MCFQSPI_IOBASE 0xFC058000
#endif