diff options
| author | Chris Metcalf <cmetcalf@tilera.com> | 2010-06-25 16:41:11 -0400 |
|---|---|---|
| committer | Chris Metcalf <cmetcalf@tilera.com> | 2010-07-06 13:34:01 -0400 |
| commit | fb702b942bf638baa6cbbbda9f76794db62921ef (patch) | |
| tree | c065b0ab61cbb80b6209c725836a6864624b3c46 /arch/tile/kernel/hvglue.lds | |
| parent | de5d9bf6541736dc7ad264d2b5cc99bc1b2ad958 (diff) | |
arch/tile: Enable more sophisticated IRQ model for 32-bit chips.
This model is based on the on-chip interrupt model used by the
TILE-Gx next-generation hardware, and interacts much more cleanly
with the Linux generic IRQ layer.
The change includes modifications to the Tilera hypervisor, which
are reflected in the hypervisor headers in arch/tile/include/arch/.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/tile/kernel/hvglue.lds')
| -rw-r--r-- | arch/tile/kernel/hvglue.lds | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/tile/kernel/hvglue.lds b/arch/tile/kernel/hvglue.lds index 698489b4c7a..2b7cd0a659a 100644 --- a/arch/tile/kernel/hvglue.lds +++ b/arch/tile/kernel/hvglue.lds @@ -46,11 +46,13 @@ hv_inquire_tiles = TEXT_OFFSET + 0x10580; hv_confstr = TEXT_OFFSET + 0x105a0; hv_reexec = TEXT_OFFSET + 0x105c0; hv_set_command_line = TEXT_OFFSET + 0x105e0; -hv_dev_register_intr_state = TEXT_OFFSET + 0x10600; +hv_clear_intr = TEXT_OFFSET + 0x10600; hv_enable_intr = TEXT_OFFSET + 0x10620; hv_disable_intr = TEXT_OFFSET + 0x10640; -hv_trigger_ipi = TEXT_OFFSET + 0x10660; -hv_store_mapping = TEXT_OFFSET + 0x10680; -hv_inquire_realpa = TEXT_OFFSET + 0x106a0; -hv_flush_all = TEXT_OFFSET + 0x106c0; -hv_glue_internals = TEXT_OFFSET + 0x106e0; +hv_raise_intr = TEXT_OFFSET + 0x10660; +hv_trigger_ipi = TEXT_OFFSET + 0x10680; +hv_store_mapping = TEXT_OFFSET + 0x106a0; +hv_inquire_realpa = TEXT_OFFSET + 0x106c0; +hv_flush_all = TEXT_OFFSET + 0x106e0; +hv_get_ipi_pte = TEXT_OFFSET + 0x10700; +hv_glue_internals = TEXT_OFFSET + 0x10720; |