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authorHaojian Zhuang <haojian.zhuang@linaro.org>2014-02-10 18:04:51 +0800
committerAndrey Konovalov <andrey.konovalov@linaro.org>2014-04-16 23:20:38 +0400
commite7c0697bc8c9058661d614efd60a5557fb1aaaa0 (patch)
tree09cf30f2f2b4bf4d5195530c7936cd4ffe4e63bf /arch
parent11602479246875b7cacfd71353768c097afba7c5 (diff)
ARM: hisi: enable PL310 L2 for hi3xxx
Enable PL310 L2 cache for Hi3xxx SoC. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-hisi/hisilicon.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/mach-hisi/hisilicon.c b/arch/arm/mach-hisi/hisilicon.c
index 741faf3e710..ae03e6128e2 100644
--- a/arch/arm/mach-hisi/hisilicon.c
+++ b/arch/arm/mach-hisi/hisilicon.c
@@ -19,6 +19,7 @@
#include <asm/proc-fns.h>
+#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -45,6 +46,34 @@ static struct map_desc hi3620_io_desc[] __initdata = {
},
};
+static struct of_device_id hi3xxx_l2cache_match[] __initdata = {
+ { .compatible = "arm,pl310-cache", },
+ {}
+};
+
+static int hi3xxx_l2_init(void)
+{
+ struct device_node *node = NULL;
+ u32 data[2];
+ int ret;
+
+ node = of_find_matching_node(NULL, hi3xxx_l2cache_match);
+ WARN_ON(!node);
+ if (!node) {
+ pr_err("Failed to find PL310 L2 cache\n");
+ return -ENOENT;
+ }
+ ret = of_property_read_u32_array(node, "hisilicon,l2cache-aux",
+ &data[0], 2);
+ if (ret < 0) {
+ data[0] = 0;
+ data[1] = ~0UL;
+ }
+ l2x0_of_init(data[0], data[1]);
+ return 0;
+}
+early_initcall(hi3xxx_l2_init);
+
static void __init hi3620_map_io(void)
{
debug_ll_io_init();