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authorBjorn Helgaas <bhelgaas@google.com>2014-01-03 18:29:00 -0700
committerBjorn Helgaas <bhelgaas@google.com>2014-01-07 11:37:12 -0700
commitb5e350f919acb8ef6961bc1b62e395f53cea123a (patch)
treeef77989abe076f705ba5d27f87e2d9e4e6cfccaa /drivers/char
parent5ef6d8f49533bb28a90ae9eec177ffd1ade54267 (diff)
agp/intel: Use pci_bus_address() to get GTTADR bus address
Per the Intel 915G/915GV/... Chipset spec (document number 301467-005), GTTADR is a standard PCI BAR. The PCI core reads GTTADR at enumeration-time. Use pci_bus_address() instead of reading it again in the driver. This works correctly for both 32-bit and 64-bit BARs. The spec above only mentions 32-bit GTTADR, but we should still use the standard interface. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/char')
-rw-r--r--drivers/char/agp/intel-agp.h2
-rw-r--r--drivers/char/agp/intel-gtt.c7
2 files changed, 4 insertions, 5 deletions
diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
index 18bbaafb850..fda073dcd96 100644
--- a/drivers/char/agp/intel-agp.h
+++ b/drivers/char/agp/intel-agp.h
@@ -115,7 +115,7 @@
/* intel 915G registers */
#define I915_GMADR_BAR 2
#define I915_MMADR_BAR 0
-#define I915_PTEADDR 0x1C
+#define I915_PTE_BAR 3
#define I915_GMCH_GMS_STOLEN_48M (0x6 << 4)
#define I915_GMCH_GMS_STOLEN_64M (0x7 << 4)
#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4)
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 58916f32c0f..dd8b66a617d 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -1102,7 +1102,7 @@ static void i965_write_entry(dma_addr_t addr,
static int i9xx_setup(void)
{
- u32 reg_addr, gtt_addr;
+ u32 reg_addr;
int size = KB(512);
reg_addr = pci_bus_address(intel_private.pcidev, I915_MMADR_BAR);
@@ -1113,9 +1113,8 @@ static int i9xx_setup(void)
switch (INTEL_GTT_GEN) {
case 3:
- pci_read_config_dword(intel_private.pcidev,
- I915_PTEADDR, &gtt_addr);
- intel_private.gtt_phys_addr = gtt_addr;
+ intel_private.gtt_phys_addr =
+ pci_bus_address(intel_private.pcidev, I915_PTE_BAR);
break;
case 5:
intel_private.gtt_phys_addr = reg_addr + MB(2);