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authorMika Westerberg <mika.westerberg@linux.intel.com>2013-01-18 13:46:00 +0000
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2013-01-23 21:14:22 +0100
commit701190fd7419f6757c19cdc6473830c79debb3ae (patch)
tree9438f9a5df7efc89aa6da318adbb772c1a4225a9 /drivers/clk/Makefile
parent3d48aab1d5035fac04fe2fbce63eedc345c0e92e (diff)
clk: x86: add support for Lynxpoint LPSS clocks
Intel Lynxpoint Low Power Subsystem hosts peripherals like UART, I2C and SPI controllers. For most of these there is a configuration register that allows software to enable and disable the functional clock. Disabling the clock while the peripheral is not used saves power. In order to take advantage of this we add a new clock gate of type lpss_gate that just re-uses the ordinary clk_gate but in addition is able to enumerate the base address register of the device using ACPI. We then create a clock tree that models the Lynxpoint LPSS clocks using these gates and fixed clocks so that we can pass clock rate to the drivers as well. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/clk/Makefile')
-rw-r--r--drivers/clk/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index ee90e87e767..ee11460a970 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_ARCH_U8500) += ux500/
obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
obj-$(CONFIG_ARCH_SUNXI) += clk-sunxi.o
obj-$(CONFIG_ARCH_ZYNQ) += clk-zynq.o
+obj-$(CONFIG_X86) += x86/
# Chip specific
obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o