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author | Victor Kamensky <victor.kamensky@linaro.org> | 2013-11-08 15:58:46 -0800 |
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committer | Andrey Konovalov <andrey.konovalov@linaro.org> | 2014-04-16 23:51:57 +0400 |
commit | aeeb7354d6fb29705af44c6420a223f838ccabc9 (patch) | |
tree | c3b72b78d9bc11d41d48f20d2bccff3d5e2128f4 /drivers/cpufreq/exynos5440-cpufreq.c | |
parent | 05440ad637ca2d0921d9a908bb02b99abdedf847 (diff) |
mmc: dw_mmc endian fix
Need to use endian neutral functions to read/write h/w registers. I.e
__raw_readl replaced with readl_relaxed and __raw_writel replaced with
writel_relaxed. The relaxed version of function will read/write LE h/w
register and byteswap it if host operates in BE mode.
However in case of this file __raw_read(wlq) and __raw_write(wlq) are also
used to transfer data from uchar buffer into h/w mmc host register. And in
this case byteswap is not need - bytes of data buffer should go into h/w
register in the same order as they are in memory. So we need to split control
mci_readl/mci_writel macros from one that operates on data mci_readw_data,
mci_readl_data, mci_readq_data, mci_writew, mci_writel_data, mci_writeq_data.
The latter one do not do byte swaps.
Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Diffstat (limited to 'drivers/cpufreq/exynos5440-cpufreq.c')
0 files changed, 0 insertions, 0 deletions