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authorLiviu Dudau <Liviu.Dudau@arm.com>2014-03-03 14:41:59 +0000
committerJon Medhurst <tixy@linaro.org>2014-04-09 18:55:11 +0100
commit5bc83dcd789a064f9b0d902796a6cb77e0fa7a45 (patch)
treec1568d8dea1a1e19902a5086cc2a86fe56b45034 /drivers/dma/pl330.c
parent71d9e3b8987265c0c4f64c542263b11d35635b23 (diff)
DMA: Fix allocation size for PL330 data buffer depth.
The datasheet for PL330 says that the data buffer value in the CRD register is 10bits wide. However, the value stored is "minus one", which the driver corrects for. Maximum value that the data buffer depth can have is 1024 lines, which requires 11 bits for storage. While making updates I found printing the peripheral ID as a hex value to be more useful as the datasheet shows the values that way. Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Diffstat (limited to 'drivers/dma/pl330.c')
-rw-r--r--drivers/dma/pl330.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 73fa9b7a10a..2e147cb75dd 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -292,7 +292,7 @@ struct pl330_config {
#define DMAC_MODE_NS (1 << 0)
unsigned int mode;
unsigned int data_bus_width:10; /* In number of bits */
- unsigned int data_buf_dep:10;
+ unsigned int data_buf_dep:11;
unsigned int num_chan:4;
unsigned int num_peri:6;
u32 peri_ns;
@@ -3034,7 +3034,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
dev_info(&adev->dev,
- "Loaded driver for PL330 DMAC-%d\n", adev->periphid);
+ "Loaded driver for PL330 DMAC-%x\n", adev->periphid);
dev_info(&adev->dev,
"\tDBUFF-%ux%ubytes Num_Chans-%u Num_Peri-%u Num_Events-%u\n",
pi->pcfg.data_buf_dep,