diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2012-07-20 12:41:07 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-07-25 18:23:55 +0200 |
| commit | 016fd0c1aee31902d82c1ac32312f1cc32298b66 (patch) | |
| tree | f7873b3741fe6aabef0e0a520b03aca16b17d75d /drivers/gpu/drm/i915/i915_gem_execbuffer.c | |
| parent | 6ac42f4148bc27e5ffd18a9ab0eac57f58822af4 (diff) | |
drm/i915: Clear the pending_gpu_fenced_access flag at the start of execbuffer
Otherwise once we use the buffer with a BLT command on gen2/3, we will
always regard future command submissions as continuing the fenced
access. However, now that we flush/invalidate between every batch we can
drop this pessimism.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_execbuffer.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_execbuffer.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 6c810798de9..55a94c1a1f5 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -413,6 +413,7 @@ i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring, obj->base.pending_read_domains = 0; obj->base.pending_write_domain = 0; + obj->pending_fenced_gpu_access = false; } list_splice(&ordered_objects, objects); |