diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-12-10 20:47:44 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-12-11 23:52:12 +0100 |
| commit | 0476190e107f398cfe0b50101bee4f8bd8e0fe30 (patch) | |
| tree | 66e539e2ccbcb5a03d2f14d2f5a764bb5afca7b4 /drivers/gpu/drm/i915/i915_gpu_error.c | |
| parent | 90791a5c644e2e06cadfe4f37de8ca81483e3a72 (diff) | |
drm/i915: Use 32bit read for BB_ADDR
The BB_ADDR register is documented to be 32bits at least since SNB.
Prior to that the high 32bits were listed as MBZ, so using a 64bit read
doesn't seem worth anything. Also the simulator doesn't like the 64bit
read. So just switch to using a 32bit read instead.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gpu_error.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gpu_error.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 79dcb8f896c..9a642921182 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -726,7 +726,7 @@ static void i915_record_ring_state(struct drm_device *dev, error->instdone[ring->id] = I915_READ(RING_INSTDONE(ring->mmio_base)); error->instps[ring->id] = I915_READ(RING_INSTPS(ring->mmio_base)); if (ring->id == RCS) - error->bbaddr = I915_READ64(BB_ADDR); + error->bbaddr = I915_READ(BB_ADDR); error->bbstate[ring->id] = I915_READ(RING_BBSTATE(ring->mmio_base)); } else { error->faddr[ring->id] = I915_READ(DMA_FADD_I8XX); |