diff options
| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2013-02-19 16:21:47 -0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-03-04 23:17:00 +0100 |
| commit | 4f3a8bc7ba6e34403f36e600bc6f54cf0e0041e4 (patch) | |
| tree | 7f2381ea438a176ead41b82484031eacc256aada /drivers/gpu/drm/i915/i915_reg.h | |
| parent | dc0fa7181132b1fde269accc4e067b8b833f34ef (diff) | |
drm/i915: rename some HDMI bit definitions
Bits used only on HDMI mode now have HDMI_ prefix instead of SDVO_.
The COLOR_FORMAT bits now have prefixes (and the 12bpc bit is for HDMI
only).
Notice that this patch uncovers a bug on the SDVO code: the
COLOR_RANGE_16_235 bit can only be used if the port is in TMDS mode,
not SDVO mode. This will have to be fixed in a later patch.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index f62e4e5014b..4cf3eceb515 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1718,19 +1718,19 @@ #define SDVOC_PRESERVE_MASK ((1 << 17) | SDVO_INTERRUPT_ENABLE) /* Gen 4 SDVO/HDMI bits: */ -#define COLOR_FORMAT_8bpc (0 << 26) +#define SDVO_COLOR_FORMAT_8bpc (0 << 26) #define SDVO_ENCODING_SDVO (0 << 10) #define SDVO_ENCODING_HDMI (2 << 10) #define HDMI_MODE_SELECT_HDMI (1 << 9) /* HDMI only */ #define HDMI_MODE_SELECT_DVI (0 << 9) /* HDMI only */ -#define SDVO_COLOR_RANGE_16_235 (1 << 8) /* HDMI only */ +#define HDMI_COLOR_RANGE_16_235 (1 << 8) /* HDMI only */ #define SDVO_AUDIO_ENABLE (1 << 6) /* VSYNC/HSYNC bits new with 965, default is to be set */ #define SDVO_VSYNC_ACTIVE_HIGH (1 << 4) #define SDVO_HSYNC_ACTIVE_HIGH (1 << 3) /* Gen 5 (IBX) SDVO/HDMI bits: */ -#define COLOR_FORMAT_12bpc (3 << 26) /* HDMI only */ +#define HDMI_COLOR_FORMAT_12bpc (3 << 26) /* HDMI only */ #define SDVOB_HOTPLUG_ENABLE (1 << 23) /* SDVO only */ /* Gen 6 (CPT) SDVO/HDMI bits: */ |