path: root/drivers/gpu/drm/i915/intel_bios.h
diff options
authorKeith Packard <keithp@keithp.com>2011-09-26 14:24:14 -0700
committerKeith Packard <keithp@keithp.com>2011-09-27 11:12:26 -0700
commitabd06860185fc613776adae792772e076d77caf2 (patch)
tree40dcc4465130ad9df6c0a79d3685853196dca6be /drivers/gpu/drm/i915/intel_bios.h
parent562396b9e46bcb34cc18f513fea1c4764d8ea06d (diff)
drv/i915: Pull display_clock_mode out of VBT table
This tells the driver whether a CK505 clock source is available on pre-PCH hardware. If so, it should be used as the non-SSC source, leaving the internal clock for use as the SSC source. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Chris Wison <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_bios.h')
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 5f8e4edcbbb..02b1b62415d 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -120,7 +120,9 @@ struct bdb_general_features {
u8 ssc_freq:1;
u8 enable_lfp_on_override:1;
u8 disable_ssc_ddt:1;
- u8 rsvd8:3; /* finish byte */
+ u8 rsvd7:1;
+ u8 display_clock_mode:1;
+ u8 rsvd8:1; /* finish byte */
/* bits 3 */
u8 disable_smooth_vision:1;