diff options
| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2013-11-04 16:06:59 -0800 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-11-05 19:28:47 +0100 |
| commit | 586f49dc781314f1e6b1133f6d966d670c219a67 (patch) | |
| tree | 638ffc11b6bfcfc706763b7b6c51fc99b8e84819 /drivers/gpu/drm/i915/intel_display.c | |
| parent | 30a970c6a6ff734eda7cefe7e88f030157a6c939 (diff) | |
drm/i915/vlv: split CCK and DDR freq usage
It's possible that the CCK clock could run at a different rate than the
DDR clock, so use the same method to get CCK as the GMBUS code does when
calculating the new CDclk divider in the VLV display code.
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 23 |
1 files changed, 8 insertions, 15 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c034413a158..3c17e959a0e 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3894,24 +3894,17 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc) I915_WRITE(BCLRPAT(crtc->pipe), 0); } -static int valleyview_get_vco(struct drm_i915_private *dev_priv) +int valleyview_get_vco(struct drm_i915_private *dev_priv) { - int vco; + int hpll_freq, vco_freq[] = { 800, 1600, 2000, 2400 }; - switch (dev_priv->mem_freq) { - default: - case 800: - vco = 800; - break; - case 1066: - vco = 1600; - break; - case 1333: - vco = 2000; - break; - } + /* Obtain SKU information */ + mutex_lock(&dev_priv->dpio_lock); + hpll_freq = vlv_cck_read(dev_priv, CCK_FUSE_REG) & + CCK_FUSE_HPLL_FREQ_MASK; + mutex_unlock(&dev_priv->dpio_lock); - return vco; + return vco_freq[hpll_freq]; } /* Adjust CDclk dividers to allow high res or save power if possible */ |