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authorDaniel Vetter <daniel.vetter@ffwll.ch>2013-06-01 19:45:56 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-06-07 10:34:01 +0200
commit3e7ca9858d51a8df2bb18b82a529df5e5f9abc51 (patch)
treefc3e81068f79cb327810f0dab0ddce36476cbf12 /drivers/gpu/drm/i915/intel_dp.c
parentbb760063790fbbc3c956f23aff4dbdfdd3c03818 (diff)
drm/i915: enable 30bpp for DP outputs
We always limited the link bw calculations to 24bpp. Tested with my shiny new high-bpc screen, seems to work as advertised. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65280 Tested-by: shui yangwei <yangweix.shui@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 759a1c5d170..6d560755cf5 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -704,7 +704,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
/* Walk through all bpp values. Luckily they're all nicely spaced with 2
* bpc in between. */
- bpp = min_t(int, 8*3, pipe_config->pipe_bpp);
+ bpp = pipe_config->pipe_bpp;
if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp)
bpp = min_t(int, bpp, dev_priv->vbt.edp_bpp);