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authorDaniel Vetter <daniel.vetter@ffwll.ch>2013-03-28 10:41:58 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-04-03 11:29:44 +0200
commitdf92b1e679d0ea682f14cdf476f98abb071a3228 (patch)
tree32960ed91a415d2b16153067f7f1f31249a0ed44 /drivers/gpu/drm/i915/intel_dp.c
parent03afc4a2618e579eab402d0b4e8b035bd873286a (diff)
drm/i915: track dp target_clock in pipe_config
We need it in the fdi m_n computation, which nicely kills almost all ugly special cases in there. It looks like we also need this to handle 12bpc hdmi correctly. Eventually it might be better to switch things around and put the target clock into adjusted_mode->clock and create a new pipe_config parameter for the port link clock. v2: Add a massive comment in the code to explain this mess. v3: s/dp_target_clock/pixel_target_clock in anticipation of the hdmi use-case. Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 70507081141..88a09e9fe58 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -762,6 +762,7 @@ found:
intel_dp->lane_count = lane_count;
adjusted_mode->clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw);
pipe_config->pipe_bpp = bpp;
+ pipe_config->pixel_target_clock = target_clock;
DRM_DEBUG_KMS("DP link bw %02x lane count %d clock %d bpp %d\n",
intel_dp->link_bw, intel_dp->lane_count,