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authorVille Syrjälä <ville.syrjala@linux.intel.com>2013-10-01 18:02:17 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-10-10 12:47:01 +0200
commit20bc86739b835da21476ea0bf7381f6aab03be64 (patch)
tree627c469af06f2efd608261960f6370db81687153 /drivers/gpu/drm/i915/intel_drv.h
parentabae50ed12b6f556afce0febb41639f0ede28fb9 (diff)
drm/i915: Enable/disable IPS when primary is enabled/disabled
IPS should be OK as long as one plane is enabled on the pipe, but it does seem to cause problems when going between primary only and sprite only. This needs more investigations, but for now just disable IPS whenever the primary plane is disabled. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index eaf0003ddfd..55c8bc4b7d9 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -677,6 +677,8 @@ ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
int dotclock);
bool intel_crtc_active(struct drm_crtc *crtc);
void i915_disable_vga_mem(struct drm_device *dev);
+void hsw_enable_ips(struct intel_crtc *crtc);
+void hsw_disable_ips(struct intel_crtc *crtc);
/* intel_dp.c */