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authorDaniel Vetter <daniel.vetter@ffwll.ch>2013-04-25 22:52:18 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-04-30 16:16:47 +0200
commit5a80c45c5297a025c2615624042ea8b6840a5376 (patch)
tree46a2e6db83dd7bcd47d6b277070c0cf75ac99601 /drivers/gpu/drm/i915/intel_lvds.c
parent2deefda541edb0c73e57e988ccaac4cd014da0d3 (diff)
drm/i915: move border color writes to pfit_enable
Writing hw registers from compute_config? Just say no! In this case not too horrible since we write a constant 0, and only debugging would put something else in there. But while checking that code I've noticed that this register disappeared on pch platforms, so fix that up, too. And adjust the comment a bit, it's outdated. Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lvds.c')
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 47f47ea64f5..d256fe454a9 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -231,7 +231,6 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
unsigned int lvds_bpp;
- int pipe;
/* Should never happen!! */
if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
@@ -274,15 +273,6 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
intel_connector->panel.fitting_mode);
}
- /*
- * Enable automatic panel scaling for non-native modes so that they fill
- * the screen. Should be enabled before the pipe is enabled, according
- * to register description and PRM.
- * Change the value here to see the borders for debugging
- */
- for_each_pipe(pipe)
- I915_WRITE(BCLRPAT(pipe), 0);
-
drm_mode_set_crtcinfo(adjusted_mode, 0);
pipe_config->timings_set = true;