diff options
| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2012-07-14 11:57:12 -0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-07-20 12:21:41 +0200 |
| commit | a4f32fc3a37e982fffce8ec583643990ff288419 (patch) | |
| tree | 39e978730518228923aa676acad7c7d524d1d78e /drivers/gpu/drm/i915/intel_panel.c | |
| parent | 09cf7c9a1299c386525d31305fd50591acf49a9a (diff) | |
drm/i915: don't forget the PCH backlight registers
When we enable/disable the CPU backlight registers we can't forget to
enable/disable the PCH backlight registers. Since we're using the CPU
registers we should also unset the override bit.
Fixes a regression on the following commit:
drm/i915: properly enable the blc controller on the right pipe
The commit just deleted the code that sets the PCH registers, so it
was relying on the values set by the BIOS. I told my BIOS to boot on
the DVI monitor instead of the LVDS panel, so I noticed the bug.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_panel.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_panel.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index 58c7ee7238b..10c7d39034e 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -289,11 +289,17 @@ void intel_panel_disable_backlight(struct drm_device *dev) intel_panel_actually_set_backlight(dev, 0); if (INTEL_INFO(dev)->gen >= 4) { - uint32_t reg; + uint32_t reg, tmp; reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2; I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE); + + if (HAS_PCH_SPLIT(dev)) { + tmp = I915_READ(BLC_PWM_PCH_CTL1); + tmp &= ~BLM_PCH_PWM_ENABLE; + I915_WRITE(BLC_PWM_PCH_CTL1, tmp); + } } } @@ -333,6 +339,13 @@ void intel_panel_enable_backlight(struct drm_device *dev, I915_WRITE(reg, tmp); POSTING_READ(reg); I915_WRITE(reg, tmp | BLM_PWM_ENABLE); + + if (HAS_PCH_SPLIT(dev)) { + tmp = I915_READ(BLC_PWM_PCH_CTL1); + tmp |= BLM_PCH_PWM_ENABLE; + tmp &= ~BLM_PCH_OVERRIDE_ENABLE; + I915_WRITE(BLC_PWM_PCH_CTL1, tmp); + } } } |