aboutsummaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/intel_pm.c
diff options
context:
space:
mode:
authorBen Widawsky <ben@bwidawsk.net>2013-11-02 21:08:00 -0700
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-11-08 18:10:06 +0100
commit4c2e7a5f6418775b7a7b47a62d07682c513259e0 (patch)
tree92c2ef9f42c3987a3177d93fc3a4dbf637622e0f /drivers/gpu/drm/i915/intel_pm.c
parenta75f36283d12d13aa278abce3a1bb6662e28fcfb (diff)
drm/i915/bdw: WaSingleSubspanDispatchOnAALinesAndPoints
Implement WaSingleSubspanDispatchOnAALinesAndPoints BDW-A workaround. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ccd1b88bc24..0a07d7c9caf 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5300,6 +5300,9 @@ static void gen8_init_clock_gating(struct drm_device *dev)
I915_WRITE(COMMON_SLICE_CHICKEN2,
_MASKED_BIT_ENABLE(GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE));
+ I915_WRITE(GEN7_HALF_SLICE_CHICKEN1,
+ _MASKED_BIT_ENABLE(GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE));
+
/* WaSwitchSolVfFArbitrationPriority */
I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL);