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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2013-11-27 17:59:22 -0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-12-10 22:27:16 +0100
commitd62292c8f778772d1b6ec125d461c8c16fdc0417 (patch)
tree229a9f99b90e0f52d7e71bdb1c54f67f0eeab880 /drivers/gpu/drm/i915/intel_pm.c
parent7125ecb8297a122d60b2b4be9490f49bfadff8e0 (diff)
drm/i915: get a PC8 reference when enabling the power well
In the current code, at haswell_modeset_global_resources, first we decide if we want to enable/disable the power well, then we decide if we want to enable/disable PC8. On the case where we're enabling PC8 this works fine, but on the case where we disable PC8 due to a non-eDP monitor being enabled, we first enable the power well and then disable PC8. Although wrong, this doesn't seem to be causing any problems now, and we don't even see anything in dmesg. But the patches for runtime D3 turn this problem into a real bug, so we need to fix it. This fixes the "modeset-non-lpsp" subtest from the "pm_pc8" test from intel-gpu-tools. v2: - Rebase (i915_disable_power_well). v3: - More reabase. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c15
1 files changed, 13 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 41b6e080e36..cd3f511847e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5688,6 +5688,8 @@ static void hsw_set_power_well(struct drm_device *dev,
unsigned long irqflags;
uint32_t tmp;
+ WARN_ON(dev_priv->pc8.enabled);
+
tmp = I915_READ(HSW_PWR_WELL_DRIVER);
is_enabled = tmp & HSW_PWR_WELL_STATE_ENABLED;
enable_requested = tmp & HSW_PWR_WELL_ENABLE_REQUEST;
@@ -5747,17 +5749,26 @@ static void hsw_set_power_well(struct drm_device *dev,
static void __intel_power_well_get(struct drm_device *dev,
struct i915_power_well *power_well)
{
- if (!power_well->count++ && power_well->set)
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
+ if (!power_well->count++ && power_well->set) {
+ hsw_disable_package_c8(dev_priv);
power_well->set(dev, power_well, true);
+ }
}
static void __intel_power_well_put(struct drm_device *dev,
struct i915_power_well *power_well)
{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
WARN_ON(!power_well->count);
- if (!--power_well->count && power_well->set && i915_disable_power_well)
+ if (!--power_well->count && power_well->set &&
+ i915_disable_power_well) {
power_well->set(dev, power_well, false);
+ hsw_enable_package_c8(dev_priv);
+ }
}
void intel_display_power_get(struct drm_device *dev,