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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-03-27 00:45:00 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-03-28 01:09:34 +0100 |
| commit | baba133ae50e563c5896d39e150b6617857a9d8e (patch) | |
| tree | bc09bd4cee8fb68dce78f65eb36cb923e0a28d91 /drivers/gpu/drm/i915/intel_sdvo.c | |
| parent | 3600836585e3fdef0a1410d63fe5ce4015007aac (diff) | |
drm/i915: clean up plane bpp confusion
- There is no 16bpc linear color format in our hw. gen4+ has a 16 bpc
float layout, but we don't really support it.
- 10bpc is a gen4+ feature, fix up the support for it.
- Update_plane should never see a wrong fb bpp value, BUG in the
corresponding cases.
v2: Rebase on top of Ville's plane pixel layout changes.
v3: Actually drop the old gen4 check for 10bpc planes, spotted
by Ville Syrjälä.
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sdvo.c')
0 files changed, 0 insertions, 0 deletions